DSP Enhances VXI Architectures

Since its inception 10 years ago, VXI has become accepted as a superior test, analysis and processing environment in today’s aerospace, communications, medical imaging and industrial markets. The increasing complexity of such VXI systems and the continuing improvements in signal acquisition performance have underscored a need for VXI-based high-performance digital signal processing.

VXI Support for Signal Processing

VXI systems provide a robust and rugged data acquisition environment. VXI modules are electromagnetically shielded and have strictly specified power and cooling requirements. For these reasons, VXI can route signals with high speed and integrity, and analog-to-digital conversion to resolutions in excess of 20 bits is common in VXI. This data moves within the VXI system in two ways:

VXI Bus—a 32 bit VME-compatible bus providing up to 40-MB/s bandwidth.

Local Bus—a set of lines supporting analog or digital communications between sets of modules in a daisy-chain fashion.

The local bus generally moves data locally at high speed without interfering with system-wide communications taking place on the VXI bus. Several high-speed local-bus protocols are common, offering upwards of 100-MB/s throughput between VXI modules. All summed, the VXI system can move vast amounts of high-resolution data and is a perfect niche for high-end signal processing hardware.

DSP Technology

The digital signal processor (DSP) is a class of microprocessors designed for real-time signal processing, particularly where the processor is tightly coupled to high-performance I/O. In this regard, it differs from conventional CISC or RISC processors: The DSP’s architecture is highly optimized to respond to I/O quickly and to move this data at very high throughputs.

Several structural features of the DSP make it a superior signal processing engine:

Multiple high-speed data/memory buses.

Various flexible I/O interfaces and on-chip I/O peripherals.

Optimized instruction set for fast parallel signal-processing arithmetic.

Fast interrupt response to I/O events.

Ease of C or assembly programming.

Support for glueless multiple-DSP configurations.

The capability to operate in a multiprocessing configuration is particularly advantageous in the VXI environment. VXI systems vary vastly in their processing requirements and demand a signal-processing element that can scale accordingly. In particular, in VXI systems with large channel counts or high data rates, the processing requirements often exceed the capabilities of a single DSP device.

Processors not designed for parallel processing are inadequate for the task because interprocessor communications quickly saturate device I/O and degrade computational efficiency. Several currently available DSPs possess on-chip support for scaleable multiprocessing. The most popular is the Texas Instruments TMS320C40. In fact, the C40 DSP exhibits all of the properties that make a DSP a good fit with VXI.


The C40 is one of five generations in the TMS320 family of DSPs from Texas Instruments. It offers 60 million floating-point operations per second of 32-bit floating performance. The processor provides two independent 32-bit memory interfaces, each delivering upwards of 100 MB/s of throughput.

In terms of real processing performance, a single C40 is capable of maintaining:

A continuous 100-tap finite-duration impulse response filter on a 300-kHz input stream.

A continuous 512-point fast Fourier transform on a 1.5-kHz input stream.

A continuous 1,024-point correlation on a 28-kHz input stream.

The C4x generation of DSPs incorporates on-chip hardware to facilitate high-speed interprocessor communications and concurrent I/O without interfering with CPU performance, as illustrated in Figure 1. Each of the communications ports is capable of 20-MB/s throughput and is the key feature of the DSP’s architecture that facilitates glueless parallel processing.

The ports serve as point-to-point links between processors, eliminating the need for a complex shared-memory parallel-processing scheme. Communications ports on various C40s can be interconnected to build a parallel processor network of unlimited scale or topology.

Alternatively, communications ports can be used as an I/O interface. Each of the C40 communications ports is associated with an on-chip DMA controller that supports full-bandwidth interprocessor communications or I/O without burdening the CPU.

Given a DSP with the flexible multiprocessing capabilities of the C40, the natural evolution is a module standard that supports the configuration of multiple C40s at the system level. The TIM-40 standard, developed by Texas Instruments in conjunction with various third parties, is an open specification tailored for the C40 processor. It describes a physical module roughly 4″ x 2″ populated by one or more C40 processors, memory of various types and configurations and possibly some form of peripheral or I/O interface.

The basic TIM-40 module is depicted in Figure 2. The TIM module brings all six of the C40’s communications ports to the module connectors, allowing C40 DSPs on various modules to be interconnected in a parallel processing network.

Since the inception of the TIM-40 standard, many modules have become commercially available. The selection includes dual-C40 modules, video capture and processing modules, large DRAM modules, high-speed serial I/O modules, digital radio receiver modules, and even FPGA-based reconfigurable computing modules. In a typical system, one or more TIM modules can be placed on a carrier board that provides sites for several modules.

The carrier board supports some mechanism to interconnect the C40 communications ports among the various modules. Generally, the board also provides interfaces to standard computer buses and access to shared resources such as memory or I/O.

By populating a chosen carrier board with a set of TIM-40 modules appropriate for the given application, you can easily configure an application-specific single-board multiple-DSP system. It is exactly this degree of flexible, scaleable parallel signal processing that high-performance VXI systems demand.

Merging the Technologies

The need for scaleable digital signal processing in VXI systems is no secret, and several hardware manufacturers are addressing this requirement as single-DSP VXI modules. However, the ever-increasing processing demands of VXI systems are fueling a movement to scaleable, multiprocessor solutions. For example, a VXI module containing two C40 DSPs and sites for up to six TIM-40 DSP modules is the result of a joint R&D project undertaken by Spectrum Signal Processing and Hewlett-Packard. Figure 3 describes the architecture of this board.

The configuration supports up to 14 C40 DSPs in a single VXI slot, all with access to the VXI bus, local bus and various shared resources. For even higher performance, the scaleable nature of the C40 DSP enables the parallel-processing network to grow beyond the capacity of the single VXI board, since DSPs on various boards can be interconnected via communications ports. It is this level of scaleable signal processing that will allow VXI to meet the requirements of tomorrow’s high-performance applications.

About the Author

Ron Klopfer is an applications engineer at Spectrum Signal Processing.

March 1997

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