As an ATE engineer, you have one of the more broadly defined jobs in electronics manufacturing. At any point, you serve as a design consultant, salesperson, fixture expert, test engineer, machine programmer, process manager, or account representative.
With the advent of the design-for-test trend, your responsibilities now range from those done before board fabrication to those done after test, including:
Recommending changes to board design to improve testability.
Performing testability analysis to determine if a board can (or should be) tested.
Quoting in-circuit test (ICT) jobs.
Selecting the best test strategy for the board.
Building or modifying the test fixture.
Creating a program for the ICT machine.
Executing the test.
Communicating test results.
Regardless of the task being performed or the electronics manufacturing process step being served, you need a standard set of information to accomplish the job. The first step requires that you collect this data and process it into information that can help analyze the board’s testability. Historically, there have been few software tools available to help with this data-preparation process.
During data preparation, the objective is to gain knowledge about the electrical function of the manufactured board. To perform an accurate ICT, first identify the points on the board where a test probe can make metal-to-metal contact. Only when electrical connectivity is achieved can you gauge whether electrical opens or shorts exist and test whether parts conform to specified values and tolerances.
The basic data set contains information about the components on the circuit board, such as part values, tolerances, centroids, pin locations, reference designators, and part descriptions. This information helps locate where parts reside on the board, identify expected part values and tolerances, and distinguish the locations where a test probe may make contact. Net list information, essential for determining whether an electrical net is shorted, also must be compiled.
Gathering a complete set of information to determine a board’s testability is challenging for several reasons. First, the information comes from a variety of electronic and paper formats. These formats—which include Gerber stencil data, CAD centroid reports, and ASCII net lists and bills of materials, to name a few—are frequently compared to one another in a highly manual process.
Since few software tools have been available to accept and compare the wide diversity of data formats, extensive lead times—three to four weeks were not uncommon—were incurred before a board’s testability could be determined. The shrinking board sizes and increasing parts counts in PCB production only exacerbated the long lead times.
Second, on occasions when you have not been consulted for design for test, the manufacturing process may cause valuable test-probe locations to be covered by solder mask or parts. Only after tedious review of the board do you find that a job cannot be tested properly.
Other times, due to the inaccessibility of probe points, a previously created fixture is grossly inaccurate. With the lack of software tools to perform quick analysis of accessible test points, rework is inevitable.
Third, there is the problem of data accuracy. Because many of the inputs used to gain knowledge about the board are from design data, the data sources often do not reflect changes to the board made in manufacturing. For example, if a manufacturing change to the board affected the location of a part, a probe that should have connected with a pin on that part no longer may make proper contact. A careful review of the data in comparison to the actual board is needed to produce an accurate report of parts, nets, and probe points.
These factors have engendered the development of a new generation of software products, such as GraphiCode’s GC-ICT™ for Windows. The benefits of these tools include:
Automatic detection of probe points covered by solder mask or parts.
Faster, more accurate testability analysis, job quoting, and test-program generation.
The capability to output accessible probe locations to fixturing packages for more accurate fixture creation.
Simplified selection of an optimum test strategy for the board.
Interoperability with other applications on the desktop, such as Microsoft Word or Excel.
The capability to process part and net-list data from multiple data formats.
Customization of the software to a unique process.
A testability report to facilitate information-sharing.
A Working Example
Let’s look at a hypothetical example that illustrates how a software tool with these capabilities might benefit ICT applications. Assume that ABC Electronics has submitted a quotation request for testing 10,000 modem boards to be completed within three weeks. The eight-layer boards, with surface-mount parts on both sides, contain 230 parts. ABC has sent a full set of Gerber data, a CAD-generated centroid file, and an ASCII bill of materials and wants the quote by the end of day.
With a software tool for ICT, the first step is to process the Gerber data sent by ABC. From this data, the software determines which probe locations are accessible and which are covered by solder mask or parts. A complete report of accessible nets from the bottom and top sides of the board can be generated within hours. The report details the number of nets accessible to probes and the number of pins on each part covered by that level of accessibility.
This information goes to the engineer preparing the quote, who views the Gerber data via the same software. The software package also processes the Gerber data to draw a graphical representation of the board, which is compared to the information in the report.
Based upon the report that groups the nets into categories of either accessible or inaccessible, all the nets are considered accessible from the bottom side of the board. As a result, no custom engineering will be required to build the fixture.
Then the file is passed to the test engineer. Based upon the work already completed, the same software package imports the CAD centroid file and ASCII bill of materials. Using the CAD centroid file, the reference designators are tied to the parts generated from the Gerber. The bill of materials information is merged, the file verified, and a board-content and board-coordinate file for the tester is output.
Along with showing that all the nets are accessible from the bottom, the report indicates accessibility from the top and from a clamshell perspective. Then, a single-sided test from the bottom side is generated. In addition, a script is invoked which sends the information to an MS Access data base to retrieve part-library information to create opens test programs.
Conclusion
Without today’s software tools, generating an accurate quotation in such a short amount of time would have been virtually impossible. Analysis of the true testability of the board would have required several days or weeks of time, so the quote generated would have been a guess at best.
Since today’s software tools quickly find probe points obscured by solder mask or parts, testability analysis and test programs that required weeks to generate only need days. With the cost of a single fixture as high as $40,000 in some instances, these software tools can provide a more competitive bid. Informative reports contained in these software packages facilitate communication and drive down the costs of information-sharing.
As a whole, the advent of new ATE software tools makes a seemingly “black art” become a more predictable, automated, mainstream process. For the newly initiated and the experienced alike, it is timely assistance.
About the Authors
Matthew D. Kelly is the strategic business development manager at GraphiCode. Mr. Kelly earned a B.S. degree in electrical engineering at the U.S. Coast Guard Academy. At the conclusion of his Coast Guard tour of duty, he joined GraphiCode in 1994.
Kara Balmer is the marketing manager at GraphiCode. Ms. Balmer has more than 10 years experience in marketing communications. She pursued a course of study in marketing and economics at Pacific Lutheran University.
GraphiCode, 6608 216th St. S.W., Suite 100, Mountlake Terrace, WA 98043, (425) 672 1980, www.graphicode.com.
August 1997