Printed circuit board (PCB) manufacturers are always looking for ways to reduce costs and improve product quality. To help reach these goals, devices such as flash ROM and in-system programmable (ISP) logic can be programmed at in-circuit test (ICT)—a technique that eliminates several steps in the production process.
Every time a device is handled, the opportunity to create a defect is introduced. As on-board programmable devices follow the trend of increased pin count using finer leads and the latest packaging technologies, they become more susceptible to damage. By programming these devices after they are on the board, there is less chance of damage due to handling.
A traditional process flow for programming these devices is shown in Figure 1. Unprogrammed devices in inventory are sent to a stand-alone station where programming data is loaded. In some cases, the same device type is programmed with many different data sets. Then, the devices are labeled, given a separate part number, and returned to stock. Defects associated with this portion of the process could be wrong or hard-to-read labels. Finally, the devices are kitted for the production floor where they are inserted into the pick-and-place machine or, at some manufacturers, manually inserted into sockets.
Many product families are designed as single hardware bases with different programs loaded into the devices. An example is an engine control unit (ECU) in an automobile. Different programs in the ECU handle variations in emission control laws from state to state and country to country. Inventory control is simplified by programming the devices later in the manufacturing process, after the final destination for the product is known.
These devices now can be configured after the board has been assembled, meaning that only nonprogrammed devices are stored in inventory. Manufacturers no longer must maintain a costly inventory for every program for each device.
Devices are handled only once, eliminating damage such as bent or broken pins. Should an ECO change the program or configuration, a simple program modification at the tester handles the change. No longer is it necessary to reprogram thousands of devices or, as is the case sometimes, to scrap the programmed devices.
Vendors of on-board programmable devices have created many different methods to program their devices. One common feature of all the methods is that the data is supplied serially. Additionally, all the vendors have a way of allowing a group of their own devices to be programmed simultaneously from a single pin.
Some devices use a proprietary programming protocol that is not based on standards. Other programmable devices support the IEEE 1149.1 boundary scan standard and use the 1149.1 port and protocol as the programming method.
Some hybrid devices support 1149.1 but use a proprietary protocol for programming the device. One particular complex family uses the same physical pins for both the 1149.1 port and the programming port. An 1149.1 compliance-enable signal determines whether the part obeys the 1149.1 protocol or the programming protocol. Such devices cannot be programmed in a single chain with normal 1149.1 devices because the 1149.1 parts will not be shifting data when the programming protocol shifts. In fact, the 1149.1 parts will see test access port sequences that make no sense while the programming protocol is being used.
These dual-mode devices could be put into a single chain with normal 1149.1 devices if the test-mode-select signal is kept separate for the two styles of devices. Another condition is the software that is used to produce programming sequences must be smart enough to operate the complex configuration correctly.
A fundamental task of any board test program is to ensure that the device is correctly soldered to the PCB. Furthermore, it should give accurate diagnosis of the defect should one occur. The industry has refined many methods for developing tests and has exploited many forms of device-testability features such as boundary scan and NAND trees to easily provide high-coverage tests with a high level of diagnostic accuracy.
When the on-board programmable device incorporates 1149.1 boundary scan, then the existing boundary scan methods can be used to test the device independently of how it has been or will be programmed. That is an extremely strong justification for using on-board programmable devices that support boundary scan.
All of the programming methods access a large amount of serial data (several hundred thousand bits is typical) which suggests that tester features intended for effective serial test application should be used. Optional hardware that can store large amounts of serial data can keep programming data separate from the programming method, making an ECO easier to implement by updating the data file stored in this memory.
The protocol and rules for applying the data form the programming method: The instructions for the tester control system and the pin commands that implement that method are placed in the tester’s normal pin memory. The data specific to programming a particular device (or group of devices) is placed in the serial data memory. That memory must be very large and hold many versions of the programming data for a particular device. By selecting the desired data set when running the programming burst, one of several programs can be loaded into the device.
Graphical user interfaces (GUIs) or wizards handle file management (Figure 2). In the case of ISP, the programmer selects the vendor file format, and the GUI invokes the correct vendor-to-ATE translator. Then, the software automatically generates the source and binary output files and places them in directories specified by the user.
Test-generation software should automatically disable devices connected to the programmable device, which eliminates signal contentions on the address, data, and control pins. Multilevel device isolation disables devices many levels back from the programmable device, providing even better isolation.
The test system also should program specific addresses with data that varies from board to board, such as serial number, lot codes, and date codes. This is a common requirement for flash memory devices.
The test system should have programming times approaching the fastest byte program time specified by the device manufacturer. Tables 1 and 2 show examples of programming times for both flash and a chain of ISP devices and the impact on throughput.
On-board programmable devices and the capability to program these devices using an ICT system help manufacturers reduce costs by decreasing process steps and controlling inventory. The reduction in device handling helps eliminate the opportunity to introduce defects in the process. The ICT systems now add value to the manufacturing process in addition to ensuring overall product quality.
About the Author
Bob Desplaines is a product marketing engineer for the Electronics Manufacturing Systems Group at GenRad. He has worked for the company for more than 11 years. GenRad, Manufacturing Systems Group, 7 Technology Park Dr., Westford, MA 01886-0033, (508) 589-7000.
Task
Time
(in seconds)
Device ID Check
0.07
Preprogrammed Check
0.22
Pre-Erased Check
0.22
Erase all Sectors
3.55
Program all Sectors
3.00
Verify All Sectors/CRC
0.13
Prescreen + Program Erased Device
3.63
Prescreen + Erase + Reprogram
7.20
Test all Address Preprogrammed
0.43
Table 1
Task
Time
Total Program Preparation Time
12.0 minutes
Total Programming Time
9.5 seconds
Table 2
Copyright 1997 Nelson Publishing Inc.
August 1997