VXI-Based System Allows Reuse of Application SoftwareVXI-Based System Allows Reuse of Application Software

Oftentimes, custom application software is developed for large data acquisition systems. Many of these systems use proprietary data acquisition hardware that is deficient by today’s standards. But the substantial effort needed to rewrite the software can prevent leaving the older, out-of-date systems and moving to state-of-the-art, open-system hardware.

This article describes a data acquisition system developed so a major jet-aircraft engine manufacturer could move to a VXI-based data acquisition system for its engine-development test cells while preserving the hundreds of man-years of application software. The Flexible Test & Measurement System (FTMS^®) Group of Northrop Grumman is the prime contractor, the software developer, and the system integrator. KineticSystems is the major supplier of VXI hardware for this project.

System Requirements

The aircraft-engine manufacturer developed the following requirements for the system:

The new data acquisition front end must preserve the host application software base.

The existing Digital Alpha and Concurrent Night Hawk host computers must be retained.

The system must support more than 1,500 data acquisition channels, be scaleable, and support channel growth.

The system must be based on an open standard and exhibit high accuracy.

Self-calibration must be provided using an in-place secondary standard.

Continuous data acquisition must be supported.

Scan rates must be configurable by software.

All data values must be available to the host computer within 2 ms after they are acquired.

System Configuration

To meet these requirements, a system was developed based upon the VXIbus open standard. This system consists of four VXI mainframes, one for host interface and system control and three for data input/output (Figure 1).

An important element in this system is the reflective-memory interface between the I/O backplane in the host computer and the host interface VXI chassis. A reflective-memory link contains two or more nodes. When data changes in one node, that change is reflected in the remaining nodes. Once updated, all memory nodes contain the same data.

Reflective-memory cards are available so a number of buses can interface to a wide range of host computers. The reflective-memory fiber-optic link operates at 150 Mbits/s. Two other key elements that allow the drop-in replacement of the existing system are the software in the Pentium Slot-0 controller in the interface chassis and the Grand Interconnect (GI) fiber-optic subsystem.

Figure 2 shows a functional block diagram of the data flow in the data acquisition system. The data in the reflective memory emulates the format presented by the existing system, preserving the extensive base of application software. By using the reflective-memory pair, command information, such as channel calibration, test start/stop, and the channel scan list, is transmitted from the host.

Similarly, instrument configuration, timing information and pointers, and acquired data are transmitted to the host. The Windows NT-based application software in the embedded Pentium Slot-0 controller provides the system setup and controls the overall flow of data during acquisition.

The GI subsystem—with its host interface, 125 Mbit/s fiber-optic highway, and Slot-0 controllers—can acquire more than 1,500 channels with a collection-to-presentation latency of 2 ms or less for any channel. This subsystem functions as an autonomous direct memory access (DMA) engine. It executes a scan list that includes multiple scan rates previously downloaded to it by the Pentium software.

During a scan, the GI subsystem places all of the data for that scan into a DMA block and moves that block of data into the local reflective-memory module, which then updates the memory in the host I/O backplane. For simplicity, Figure 2 shows the configuration and status information taking place directly between the Pentium Slot-0 controller and the I/O modules. In actual practice, this information is communicated via the GI subsystem.

The real-time performance of the GI is accomplished by controlling all timing within the GI host interface. This makes all critical actions hardware driven (avoiding software latencies), uses a self-contained RAM memory for controlling scan execution, and employs a deterministic highway protocol. If the Pentium Slot-0 controller were to drive the scanning of each channel by software instead of using the GI to combine the data from all channels into a single DMA block, then the required system throughput could not be realized.

Data Quality

We have described the methods used to preserve the application software base and provide the desired throughput. More important is the accuracy of the data being acquired. A small measurement error made during developmental engine testing could cost an airline millions of dollars in fuel expenditures. The high system accuracy—including a 3-µV accuracy requirement for the low-level channels on the 2.5-mV range—is achieved in a number of ways:

The low-level signal-conditioning channels and host analog-to-digital converter modules are designed to achieve high initial accuracy, low drift with temperature, and low system-generated noise.

A jet-aircraft test cell is an electrically noisy environment. An active low-pass filter associated with each channel suppresses out-of-band input noise. However, if high-frequency noise enters the input amplifier of the data system, accuracy can easily be destroyed.

To maintain the desired accuracy, an input circuit is associated with each low-level channel (Figure 3). The R-C filter attenuates high frequencies that appear line-to-line in the balanced input.

A three-winding transformer, wound with trifilar wire for tight coupling, provides cancellation of high-frequency common-mode noise (from both lines to ground) at the input amplifier terminals. Each of the windings is poled so that the start of the winding is on the left side of the diagram. This attenuation compensates for the fact that a typical instrumentation amplifier provides extremely poor common-mode rejection at frequencies from 20 kHz to 50 kHz, depending on the amplifier.

The input channels are self-calibrated. Prior to a test run, a precision calibration source that is part of the data system is substituted for each channel input. Gain and offset are checked for each input range. The calibration source accuracy is traceable to National Institute of Science and Technology standards. The entire calibration sequence is performed automatically when the host computer makes a request for system calibration.

Each tachometer channel is monitored by a novel circuit that supplies ±0.001% accuracy from 0.59 Hz to 50 kHz without changing ranges. Most counters would provide poor performance at one end or the other of a 100,000:1 frequency shift on any given range. Shaft rotation within the jet-aircraft engine must be accurately monitored over a wide range of speeds.

A number of remote chassis are used to monitor pressures. These chassis convert the pressure values to calibration-corrected engineering units. The values then are sent via Ethernet to a Pentium processor in one of the I/O mainframes. Self-calibration is provided on each of the sensor chassis to guarantee a high degree of accuracy.

Conclusions

The data acquisition system described here provides the channel count, throughput, accuracy, and expandability that is required to test jet-aircraft engines during development. It is based on the VXI open standard and offers flexibility in meeting future test-cell requirements. The system replaces existing proprietary hardware and preserves the extensive application software base. Because of the modular nature of the system, this approach can be applied to a variety of testing needs.

About the Authors

Robert T. Cleary is the chief executive officer and a cofounder of KineticSystems. He has been involved in the data acquisition industry for more than 25 years, has lectured on the subject and written numerous articles and technical papers, and holds 18 U.S. and 28 foreign patents. Mr. Cleary is a graduate of the Illinois Institute of Technology with a B.S.E.E. degree. KineticSystems, 900 N. State St., Lockport, IL 60441, (815) 838-0005, e-mail: [email protected].

Michael P. Zayac is program manager of FTMS at Northrop Grumman and cofounder of the FTMS product line. He has more than 20 years of experience in test and measurement systems integration. Mr. Zayac received a B.S. degree in computer engineering from Case Western Reserve University. Northrop Grumman, Electronic Sensors and Systems Division, 18901 Euclid Ave., Cleveland, OH 44117, (410) 765-9878, e-mail: [email protected].

March 1998