The suppliers of shipping trays and tape-and-reel products have been working diligently to develop new resin systems to provide low-cost, intrinsically static-dissipative media for handling today’s electronic devices. In parallel, the ESD Association is making excellent progress on finalizing a standard that outlines the techniques and methodology for both types of shipping products.
The damage associated with product exiting the final mile of the assembly environment is difficult to isolate. Typically, the failure rate is low and sporadic and not realized until some other event has indirectly brought it to the forefront.
Thermal processing requirements drive the bulk of today’s products to use trays as the medium of choice. As a result, processes and materials are strung together, making end-point testing effective but also difficult in isolating problematic areas.
The tray industry usually relies on the JEDEC design rules in Electronic Industry Association (EIA)/JESD 95-1 Chapter 10 and several JEDEC documents targeted at specific tray applications. There is an overlying level of documentation contained within EIA 541 that addresses testing methodology and resistivity targets for insulative, dissipative, and conductive ranges.
These testing methodologies existed prior to the introduction of tray products. The specifications cover various types and shapes. But while suitable for many applications, they fall short in defining methods for testing a shipping tray with today’s many features and styles.
The test methods are under review by the ESD Association as the need is recognized for a testing standard applicable to the unique conditions presented by tray products. Currently, alternative methods and approaches to verify ESD performance are in the final stages of round-robin testing.
Generally speaking, there are two approaches to obtaining the desired electrical characteristics in tray products. In the low-cost, low-temperature, nonbakeable category, the industry traditionally has used a coating process that relies heavily on humidity. Aside from the application variables, this coating process has worked well for the industry. As the cost of resins and fillers continues to decrease and development of low-cost alternative filler systems approaches reality, the cost differential between topically coated and intrinsic materials begins to merge.
Technology advancements aside, the most popular filler used within the intrinsic blends is conductive carbon in either the powder or fiber configuration. Within the molding environment, the amount and aspect ratio (for fiber) impact the conductive range as well as the molding and mechanical characteristics of the tray.
Flow rate, resistivity, flatness, and shrink rate are some of the more critical elements to consider during blend development. Due to the steep slope of the resistivity vs concentration curve within the percolation threshold, the ratio of powder to resin moves the electrical characteristics into the resistive or the conductive range, with little opportunity to achieve a reliable midrange target.
Material selections become tightly targeted once ESD characteristics, strength, flatness, and bake requirements are defined for the finished product. Flow patterns within the tray and temperature at the mold faces can impact the rate of charge spreading across the surface as well as through the material.
The results are readily visible when measuring ESD characteristics across a tray, providing more than one method of measurement is used to characterize the discharge capabilities. To correlate with the various systems used globally, it is necessary to implement more than two methodologies in the measuring process.
Readings using a surface-resistivity meter typically are taken in three locations (total of six) on both sides of the tray. Three additional readings are made across the breadth of the tray using an electrometer. Testing in this manner assures you have a compliant product regardless of the measurement methodology used.
Historically, the market has experimented with various measurement methodologies. Usually, surface-resistivity meters, static-decay systems, and triboelectric decay and programmable electrometers of various configurations are used (Table 1).
The most common system—the surface resistivity meter—has its own set of design limitations that may render it ineffective for accurate analysis. While this system is very easy to operate and lends itself as a manufacturing tool for identifying change, it may provide a false sense of security or alarm as a result of the trip points configured in the system design.
Equipment condition and design limitations have created cases of false triggering to the next range level. This results in conductive trays triggering a dissipative reading or, at the other extreme, a dissipative tray triggering an insulative reading.
Tribocharge systems seem to be impacted as much by texture as they are by material. As a result, a highly polished surface may not build a charge even though the intrinsic material is well above the minimum insulative range. This type of test was a good indicator to the industry in its infancy when topical coatings were used heavily throughout the industry. With the development of intrinsic material, this test has become less meaningful.
Static-decay systems evaluate high-charge, high-resistivity materials unlike current models developed in the semiconductor arena. EIA 541 defines static-decay testing as an alternative test that must be considered in addition to other, more definitive testing methods. Even when tested in the 5-kV range, the discharge rates of the materials in question consistently pass, even when out of the upper dissipative limit.
In the area of electrometers, there is ample margin for developing a workable and repeatable methodology within half-power accuracy for measuring the narrow band defined as dissipative surface resistivity or volume conductivity. The ESD Association, in cooperation with IEEE, has been studying the use and implementation methodologies of an electrometer for a couple of years.
The preferred method seems to be 100-V loading while measuring current drain. In practice, we have found limitations and problems in corrrelating results from current source reserves.
In the autorange mode, some newer equipment can source a high current, loading the product in question until a discharge path is established. At this point, the resistivity of the material under test drops, and a false reading may result.
Dropping the load voltage and or restricting the current-source autoranging can overcome this problem. Typically, this problem will occur with material residing in the lower-level dissipative range. The ESD Association is performing a round-robin validity test using a dual-probe, two-point resistance method in this configuration for measuring tray pockets. As a basis for establishing some consistency for the market, we hope a technical report will be approved very soon.
Physics of Measurement
When analyzing pathways for electron movement in a topically coated tray, it is relatively easy to model the charge path because the bulk material is insulative while the coating is dissipative. The charge takes the easier course at the surface of the tray. The market targets the coating processes to achieve midrange dissipation. In this application, the surface meter lends itself to accurately monitoring and recording data values.
When analyzing intrinsic material, the charge pathway is not as simplistic. Depending on the path of least resistance at any particular node, the charge will migrate to the path of least resistance. In some cases, this may be a parallel path through both the surface and bulk material.
In this application, the electrometer is more useful. It can be used in the analysis of topically coated trays even though it is more complex to use than the surface meter.
When using electrometers, make sure a system has the capability to provide an accurate end-range readout. A five- or six-place digital capability is preferred, implying a table model be used rather than a hand-held model where analog end-scaling ranges are compressed and difficult to read.
Over the past decade, the shipping-tray industry has undergone a significant transition in managing and measuring static-charge dissipation. Due to the risk potential, the industry is in great need of a definitive and standardized approach for measurement and detection. Methodologies are not universally applied across the industry and, with varying instrumentation, can result in misleading summations regarding tray performance.
The development activity underway within the ESD Association is nearing completion. A unified approach in measurement methodology to drive product consistency is eagerly anticipated.
About the Author
Larry Forsyth is responsible for global quality and product engineering support within the Pacific Rim and United States in support of ITW Camtex tray products. In 27 years in the semiconductor arena, his experiences span sales, manufacturing, operations, and engineering of packaging and product development. Mr. Forsyth is a B.S.E.E. graduate of Texas A&M. ITW Camtex, Division of Electronic Components Packaging Systems, 3301 E. Randol Mill Rd., Arlington, TX 76011-6839, (817) 649-5793.
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