Logic Analyzers Probe for the Truth

For more information on digital signal, see the 
sidebar “Maintaining Digital Signal Integrity.”

Have logic analyzers been victims of unreasonable customer expectations or just bad press? Not long after Hewlett-Packard introduced a state analyzer and Biomation launched a timing analyzer (the two modes were very separate initially), users began referring to this class of instrument as the solution of last resort. Is this description still justified?

As logic analyzers became more complex in the 1980s, there is no question that they also became harder to use. For example, multiple-level trigger trees were introduced to cope with all possible IF, THEN, ELSE conditions. The triggering certainly became more comprehensive but was simultaneously less comprehensible to most users.

Probing also has grown in importance from the days when it was quite practical to clip 16 separate leads onto through-hole components and DIP legs with 0.1″ spacing. With today’s logic analyzers offering hundreds of channels operating at 200 MHz or more, connecting to the signals is a very real problem. A variety of adaptors, clips, and grabbers helps, but the best solution is to design in low-cost headers to which the logic analyzer can be directly connected. See the sidebar Maintaining Digital Signal Integrity.

Today’s Trends

Recently, solutions to some fundamental logic-analyzer problems have been found in the continuing convergence of computers and instruments. Tim Bieber, the TLA 700 Series product marketing manager at Tektronix, said, “Customer comments have had two consistent themes: Navigation, that is, how do I drive it, and discoverability or how is the feature set organized? Tektronix solved the navigation problem by adopting Microsoft’s Windows interface. Almost everyone knows how to drive Windows.”

Providing improved discoverability involved architectural changes. By treating all data simply as data and ensuring its time correlation, the presentation of different types of information displays in multiple windows is possible. As an example, for a microprocessor, timing and state displays and disassembled source code can be viewed simultaneously and the cursors in each window linked to track each other.

With regard to triggering, traditionally one of the most difficult logic-analyzer functional areas, Mr. Bieber said, “Trigger libraries are provided to simplify the setup of complex trigger events and ensure that you are focused on solving your problem, not debugging the logic analyzer’s trigger setup. The libraries contain many of the popular trigger setups that can serve as starting points should modification be required.”

Very specific trigger capabilities address only part of the problem. “In addition to having the ability to trigger directly on the fault, users also want to look back in time to find the root cause of the fault and its surrounding context,” he continued. “Sophisticated triggering and deep memories are complementary capabilities.”

The use of Windows on a PC-based platform offers many benefits beyond user familiarity and consequent ease of use. Given the right software and associated tools, remote control and connectivity via the internet, source code and symbol extraction from object file formats, support for Microsoft’s COM/DCOM standard, and processor run control are all practical.

Ask the Customer

Before developing its new LogicWave® series of PC-based logic analyzers, Agilent Technologies (formerly HP) investigated several logic analyzer-related issues through a number of research channels. Surveys of current customers and other digital designers, customer visits, focus groups, and discussions with Agilent Technologies’ field and sales engineers provided thousands of responses. From this information, a picture emerged of the conflicting requirements often faced by logic-analyzer users.

Respondents’ perceptions range from logic analyzers being great tools to being hard to use and expensive. On the other side of the issue, the systems being tested are becoming faster and more complex. To address these changes, logic-analyzer manufacturers have developed more powerful instruments with many levels of menus and sophisticated capabilities. It’s just what’s needed if you can master their use. But not all users want to. Ease of use accounts for 54% of current frustrations, according to the survey results.

Lon Hintze, a logic analyzer product manager at Agilent Technologies, said, “Customers doing cutting-edge design want depth of insight, but most others want to reduce the time required to gain insight. Most users want easy-to-use tools that are affordable and offer basic functionality.” Following this reasoning, the specifications of the Agilent Technologies LogicWave are aimed at the very large use of 8- and 16-bit processors and microcontrollers and FPGAs.

Agilent Technologies continues to produce a range of stand-alone logic analyzers targeted at complex, sometimes multibus problems. However, the fact that everyone doesn’t require or want the same level of logic-analyzer capabilities was an important research finding and may allow the company to address a larger market.

Internal Chip Registers

Mr. Bieber of Tektronix briefly described the recent evolution of the logic analyzer from its hardware engineering roots: “In the 1990s, high-level language (HLL) source support was added to allow users to correlate the data acquired in real-time by their logic analyzers with the HLL source code they wrote and to trigger from the HLL source window. This opened up logic analyzers to embedded software developers.

“Emulator-like control of the user’s target system also has been added,” he continued. “This allows users to control their target system, start, stop, read registers, and set breakpoints from their logic analyzer.”

Because very fast clock and data rates have made external emulators impractical, microprocessor manufacturers now include emulation capabilities on-chip. For example, Agilent Technologies’ logic-analyzer emulation modules access the on-chip emulation data via processor analysis probes, and they work with third-party debuggers. A source correlation tool set links real-time trace listings with high-level source code to show you how the code actually executes inside your target system.

Within microprocessor systems, a large number of official or de facto bus standards can be found. Both the physical number and arrangement of signals and the protocols they follow make troubleshooting difficult with a conventional logic analyzer. Each bus has been developed to solve a particular problem, often involving speed.

For example, Intel’s Peripheral Component Interconnect bus (PCI) supports 132 MB/s data transfer, a huge improvement over the 1 to 3 MB/s of the ISA bus. FuturePlus Systems makes analysis probes that interface an Agilent Technologies logic analyzer to several kinds of buses, including PCI.

Bill Furch, vice president of Marketing at FuturePlus, said that an inverse assembler running in the logic analyzer decodes the key PCI bus signals and provides a display of transaction type, address, data, and bus-status conditions such as wait states and retries. All PCI cycles and transaction identifiers are decoded, allowing the user to trigger on events such as data parity valid.

PC-Based Logic Analyzers

While some high-end stand-alone logic analyzers have embedded a PC, others exist as cards within a PC or as separate chassis connected to a PC. Fast logic-analyzer performance results from several trends that have developed in parallel: higher-speed PCs, better PC display and I/O capabilities, general acceptance of Windows, and readily available ASIC technology.

The factor that distinguishes today’s plug-in and modular logic analyzers is their reliance upon the PC for as much functionality as possible. Earlier PC-based logic analyzers often were complete instruments except for front-panel control, display, and archiving. They required IEEE 488 control because serial RS-232 was too slow. Today’s PC-based logic analyzers acquire data but interface with the PC via a high-speed bus. As a result, low-cost logic-analyzer peripherals can be more fully integrated with the PC.

Logic Analyzers in Your SOCs

One idea presented at this year’s International Test Conference by Dr. Bulent Dervisoglu, vice president of Intellitech, is to embed logic analyzers within systems-on-a-chip (SOCs). In his paper entitled, Design for Testability: It Is Time to Deliver It for Time-to-Market, he argued that many DFT methods only consider the third letter of SOC; that is, they approach testing from the chip point of view. Much shorter time-to-market and higher return may result by considering test from the system point of view, given the level of complexity possible within an SOC.

What is required to test a complex system? If the system were constructed of discrete modules, test engineers would probe the interfaces between the modules to determine signal integrity and functionality. Because few interfaces are accessible on an SOC, Dr. Dervisoglu proposed embedding a logic analyzer and a service processor unit to exercise and observe the functionality of the subsystems within an SOC.

Conclusion

If you work with digital logic signals, chances are that you may need to use a logic analyzer at some time. Try to choose one that meets your requirements but doesn’t exceed them by too much. Ease of use is more likely to be found on instruments with fewer functions to control, fewer levels of menus, and generally less complexity.

On the other hand, if you need the fastest, largest, most analysis-heavy logic analyzer on the planet, there are solutions available. However, in these state-of-the-art situations, it’s the little things like channel-to-channel skew or probe loading that, if overlooked, can turn a really great idea into a $50,000 learning experience.

Make sure that the fundamentals of signal capture are satisfied first. Once you know the data being captured is meaningful, the sky’s the limit with regard to its analysis.

For more information on digital signal,  see the 
sidebar “Maintaining Digital Signal Integrity.”

Published by EE-Evaluation Engineering
All contents © 1999 Nelson Publishing Inc.
No reprint, distribution, or reuse in any medium is permitted
without the express written consent of the publisher.

December 1999

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