EMC-aware designs eliminate objectionable interference at the source.
Clock signals figure prominently in microprocessor-controlled systems. Regardless of their architecture, digital processing engines generally require a pacing signal to run internal counters that keep track of addresses and data values and drive state machines.
To increase the number and types of applications a microcontroller can address, manufacturers have added functionality and sometimes more clocks. For example, the Atmel ATmega 103(L) has a programmable watchdog timer with its own oscillator, a real-time counter with a separate oscillator, and a third oscillator that provides the system clock.
Even if a device can accept a wide range of clock speeds, the vast majority of systems run at a constant, often crystal-controlled, rate. Why is this so? An obvious reason is that many applications are related to time. For example, a data acquisition system could be required to sample a signal every millisecond. Although there may not be a 1-kHz oscillator in the system, the necessary 1-kHz rate will be derived from a higher-frequency clock.
Also, background functions within a device may occur only after a certain number of clock edges. For example, if a designer wants the system health to be monitored frequently, the range of possible watchdog timer clock frequencies will be constrained. And, applications often involve remote control or data transfer through an interface. Here again, a clock may be required to synchronize a serial interface such as RS-232.
Nevertheless, there is a downside to using a constant speed clock: It pollutes. In terms of EMI, the usual square-wave clock signal consists of the fundamental frequency and a number of odd harmonics. Depending on board layout, signal amplitude, signal rise time, and circuit impedance, the energy radiated will be within appropriate regulatory limits or not.
If it is not, most engineers will try to reduce EMI by shielding, applying ferrite beads, and inserting resistance to reduce signal edge speeds. Certainly, these approaches are useful, but so too is rethinking the need for a truly constant clock signal. Several techniques spread the clock energy over a larger number of spectral lines, lowering the amplitude at any one frequency.
Spreading Noise More Thinly
Dithering
Intentional clock-rate modulation, commonly called dithering or spread-spectrum clocking, has been used for many years to reduce peak emission levels. Of course, as the name of this section implies, dithering does not reduce the amount of noise generated; it just distributes the interference differently to comply with EMI/EMC regulations.
An article by Cornelis Hoekstra that originally appeared in the August 1997 issue of the Hewlett-Packard Journal described the experience of HP divisions that used clock dithering. Typically, the clock frequency was altered by less than 2% using several different techniques.
For a square modulation waveform running at a relatively low frequency, the clock rate hopped between two stable frequencies. As the modulation speed was increased, several effects such as the basic IC process speed and the speed of the phase locked loop (PLL) controlling the clock caused the clock rate to become more widely distributed among frequencies between the original two. In fact, a fast PLL filter with overshoot produced a ringing effect with clock frequencies exceeding the desired �1% or �2% limits before settling.
Some systems did not operate correctly with clock signals having abrupt cycle-to-cycle timing differences, so a triangular modulation technique was developed. Rather than the clock spectrum being sensitive to modulation speed as for square-wave modulation, clock rate is spread evenly between limits by a triangular modulation waveform. This waveform corresponded to a much more narrowband PLL loop filter, which ensured only a gradual change from cycle to cycle.
Both approaches have been used in various HP products to achieve EMI/EMC compliance. However, as Mr. Hoekstra pointed out, there�s often a large difference between conducted and radiated emissions. Every product has its own antenna characteristics, and an amount of uncertainty is associated with measurements. Programmability of the type of modulation, its deviation, and whether it�s used at all are useful when evaluating the overall product�s EMI characteristics.1
In a related application, the subject of a 2006 IEEE EMC Symposium paper, dithering has been used to reduce automotive radio interference caused by pulse width modulated (PWM) electric motor drives. Although accurate speed control can be achieved by varying the drive signal on/off duty cycle, the sum of the on and off times equals a fixed switching period T. This type of signal results in a series of spectral lines whose amplitudes are bounded by a sinc-shaped envelope. The lines are spaced apart by integer multiples of 1/T.
The fact that PWM interference is narrowband in nature means that the CISPR 25 regulations are at least 19 dB more stringent than if the noise had been broadband. This follows from an automotive radio�s sensitivity to fixed-frequency narrowband interference that easily can add audible tones or mask a desired audio signal.
The solution adopted by the paper�s authors was to dither the switching frequency to convert the resulting interference to a broadband signal. Figures 1a and 1b contrast the narrowband spectrum corresponding to a fixed PWM frequency to the broadband spectrum resulting from dithering. Not only does dithering reduce peak amplitudes by spreading the spectral energy, but in this case, changing the nature of the noise also allowed a less rigorous test limit to be used.
Figure 1a. Spectrum With Fixed Frequency PWM
Courtesy of IEEE
Audio and thermal considerations limit the range of PWM frequencies available to between 18 kHz and 30 kHz. Also, the authors reported, �Fairly white sounding noise can be achieved when hopping at a period less than 500 �s.�
To meet both constraints, approximately 500 �s of complete cycles at one frequency are generated before hopping to another frequency. By choosing frequencies carefully, the hopping rate will vary around the desired 2 kHz and not generate a constant tone that would result if the hopping frequency were exactly 2 kHz.
In a typical implementation, a 16-state shift register-based pseudorandom generator was used to select the order in which corresponding switching frequencies were used. Rates ranged from 18.394 kHz to 21.181 kHz. The technique allowed emissions to meet the CISPR 25 limits, but more importantly, it reduced objectionable noise from the car�s radio. Instead of a very noticeable tone, a barely audible and natural sounding white noise results from the car�s PWM motor controllers.2
Using a Constant-Rate Clock
Dithering may help a product meet the relevant emission limits, but perhaps you can�t allow the clock rate to change in your design. In a 2006 IEEE International Symposium on EMC paper by Gregory Ebert from Intel, a straightforward method is presented that reduces the EMI peak amplitude while generating a constant rate clock. In this approach, the bandwidth of the clock signal is significantly increased and some of the objectionable energy spread into that additional bandwidth.
The system varies the duty cycle of the clock reciprocally. That is, rather than a constant 50% duty cycle, this approach might have one clock cycle with a 10% duty cycle and another with a 90% duty cycle. The active, assumed positive, edges of successive clock pulses are evenly spaced, but not the falling edges. By specifying a reciprocal relationship among pairs of clock pulses, the average DC balance is maintained.
In Mr. Ebert�s paper, pairs of clock periods with reciprocal duty cycles were grouped for analysis. An expression for the Fourier series corresponding to such a pair of clocks consisted of two sinc terms representing each cycle of the two-cycle pair. Harmonic amplitudes computed from Fourier expressions for 10/90, 20/80, and 30/70 duty cycles showed very good correlation with actual measurements made using a pulse generator and spectrum analyzer.
Measurements of the emissions from a 3-m long high-definition multimedia interface (HDMI) cable were made within an anechoic chamber for each of the duty-cycle ratios as well as the original 50% square-wave clock. Although all three of the alternative duty cycles failed the FCC limits at frequencies above 800 MHz, lower-frequency harmonics and the fundamental were significantly reduced in amplitude.
Mr. Ebert proposed combining successive pairs of different duty-cycle clock periods to further spread harmonic energy, but he also pointed out some undesirable effects of this clocking approach. There will be a slight disturbance at DC, although for the 270-MHz clock rate used as an example in his paper, the average disturbance over a time scale of microseconds, for example, is nil.
Perhaps of more importance is the intersymbol interference (ISI) the different duty-cycle clocks will have upon each other. This type of effect is seen as duty-cycle-dependent jitter. Finally, extending the technique to achieve a greater harmonic amplitude reduction necessarily adds complexity to the clock generator. A scheme similar to the pseudorandom sequence generator developed in the PWM motor-drive example would be required.3
Stopping Noise From Spreading
It�s impossible to have very fast clock rates and edge speeds without encountering EMI at some level. On the other hand, ICs can be designed to minimize generated EMI, for example, by adjacent power and ground pin placement to reduce the area of the loop formed by the power input and return paths. Nevertheless, a PCB using the IC still can radiate excessively. This type of problem was investigated in a 2006 IEEE International Symposium on EMC paper entitled �Application of Chip-Level EMC in Automotive Product Design.�4
The authors argue that cost constraints limit the types of EMI remedies that may be used in automotive electronics. So, rather than simply filtering EMI, the most cost-effective approach may be based on a thorough understanding of the mechanisms coupling the signals from the very small ICs to the larger structures such as PCB traces or power wiring from which they are radiated. Once the mechanisms are understood, the least expensive remedies can be applied.
Interference from a PCB with a 32-b microcontroller was studied in depth to determine the root cause of high switching noise. The device was operated at a 32-MHz internal clock rate, corresponding to a 4-MHz external rate, but only internal memory was accessed. In an effort to isolate the source of the interference to the microcontroller chip itself, no I/O lines were switched.
With ferrite clamps on the board�s DC power supply leads, radiated emissions were reduced to a peak of about -65 dBm within a 30- to 400-MHz band. However, when a 1-m cable was attached to the I/O pins, interference levels as high as -46 dBm were measured. The largest values occurred when the microcontroller drove an output high. Because current flows between the Vddio and Vssio pins when an I/O line is switched, this current was suspected to be a source of the interference.
Possible radiation from the power supply lines was investigated by attaching two 50-cm wires to the PCB ground plane to act as a dipole antenna. Depending on the X-Y orientation of the wires, emissions as high as -55 dBm were found. This effect was thought to result from common-mode voltages induced by current flow from the power plane through the IC and back to the return plane.
Initial measurements were made in an anechoic chamber. The work focused on the I/O pins and power pins because these currents are the largest, but this phase of the investigation was only intended to give clues and suggest hypotheses. More direct measurements of the IC�s performance were made via near magnetic-field scans in a TEM cell following the recommendations of IEC 61967.
As shown in Figure 2a, there are strong magnetic fields close to two Vddio pins and a Vss pin. From corresponding phase plots, it was determined that current was flowing from the Vddio to the Vss pin, and the magnitude of the current was confirmed by a special slotted coaxial cable probe.
By inserting a ferrite element in series with the Vddio supply, increasing its impedance at frequencies around 100 MHz, the interference was reduced as shown in Figure 2b. Instead of fields associated with Vddio dominating, after the ferrite was added, the situation changed with Vssio currents dominating. The nomenclature including io relates to supplies connected to the I/O drivers. These are separate from supplies connected to the microcontroller core such as Vss.
Just as it�s very difficult to connect a conventional oscilloscope voltage probe to an IC�s very small and closely spaced leads, so too it is difficult to attribute the output of a current loop to the activity of only one pin. Figure 3 shows the construction of the slotted coaxial cable probe used in this investigation. �Magnetic flux from the pin enters the slot and wraps the inner conductor�. Because the slot is very small, the probe is able to focus relatively precisely on the fields generated by a single pin.�
Several other tests were performed with inconclusive results. For the particular device being investigated, many different types of effects appeared to be present. Certainly, the interaction of I/O currents with the central processor core power supplies was changed by adding ferrite in series with the Vddio line. However, the improvement in emission levels was only seen at frequencies below about 200 MHz. Apparently, another mechanism was operating at higher frequencies.
The authors demonstrated the use of a number of important troubleshooting tools as well as a logical approach to the overall job of EMI reduction. However, in this case, a brute-force solution such as filtering each of the I/O lines or buffering the lines with a separate IC might be the only practical way to lower the level of emissions across the entire 30- to 400-MHz frequency band. Although mentioned in the paper, these solutions were not favored because of their cost.
A final paper, also presented at the 2006 IEEE International Symposium on EMC, discussed the possible effects that small changes in power supply impedance may have on radiated emissions. In particular, it highlighted the roles decoupling capacitors play in digital PCB designs.
Typically, a decoupling capacitor is used to locally satisfy transient current demands, for example, when a device such as a clock driver switches state. Of course, without the capacitor, the device still will change state, but the sudden change in supply current may add noise to the supply voltage. More importantly, if the power supply connection to the IC and the return path from it form a loop with significant area, emission levels will be affected.
Decoupling capacitors are used in large numbers and generally accomplish their intended goal. The author mentioned the possibility of capacitors increasing a PCB�s EMI/EMC levels if the mounting inductance of the capacitor resonates with the PCB�s distributed capacitance. Although this could occur, it was not the problem causing the author�s PCB to fail EMC testing.
Fortunately, the board in question had been through previous revisions that did comply with both the legal limits and the more stringent levels set by the author�s company. So, when a new version failed the tests, finding the problem was relatively straightforward. On the other hand, why did removing recently added decoupling capacitors reduce the emissions levels?
In complicated circuits such as the four-port Gigabit Ethernet PCI-X adapter card in this example or the 32-b automotive HVAC microcontroller previously discussed, many effects are simultaneously interacting. During development of version A of the Ethernet board, the author had found the area near the four RJ-45 connectors to be sensitive. That is, noise on the 2.5-V PCB layer directly affected noise injected into the center taps of the coupling transformers. And, quiet center taps mean more common-mode noise can be rejected in a conducted immunity test.
To reduce noise sufficiently, a ground plane was inserted between the noisy 3.3-V layer and the 2.5-V layer in version B of the board. This version passed the tests with ease. In adding capacitors to the version C board layout, engineers inadvertently changed the current flow in the sensitive area of the board. The capacitors reduced local loop areas and perhaps the local 3.3-V supply was cleaner, but the paths taken by transient currents had changed for the worse. Some of the peak levels had increased by 15 dB.5
Summary
By discussing detailed examples of EMI mitigation, many related topics have been touched upon: clock signals, their generation, and their unintentional effects; test methods including near magnetic-field scanning in a TEM cell, probing with a miniscule loop antenna, and before/after comparisons in an anechoic chamber; and the importance of understanding the mechanisms underlying EMI generation.
In the real world of product development, an engineer may have a relatively short time in which to correct noncompliant performance. The difficulties of the 32-b microcontroller investigation challenged the combined skills of the authors, but it wasn�t lack of ability or tools that produced inconclusive results. Rather, the complex nature of EMI/EMC problems requires that they must be considered as much as possible during the design phase.
Until all designs are thoroughly simulated for EMI effects, the EMC test lab will continue to be a valuable resource. A lab performs EMC compliance testing, but the technical personnel also serve in an advisory capacity, suggesting possible solutions for noncompliant circuits. The cost of consulting lab experts often is small compared to the time saved in a product-introduction schedule.
References
1. Hoekstra, C., �Frequency Modulation of System Clocks for EMI Reduction�Electromagnetic Interference�Company Business and Marketing,� Hewlett-Packard Journal, August 1997.
2. Comstock, L., et al, �Reduction in Radio Interference Through PWM Frequency Dithering,� Proceedings of the 2006 IEEE International Symposium on EMC.
3. Ebert, G., �Using Reciprocating Duty Cycles to Create Reduced EMI Clock Signals,� Proceedings of the 2006 IEEE International Symposium on EMC.
4. Hu, K., et al, �Application of Chip-Level EMC in Automotive Product Design,� Proceedings of the 2006 IEEE International Symposium on EMC.
5. Slone, R. D., �A Potential Effect of Decoupling Capacitor Placement on Radiated Emissions: The Rerouting of Current,� Proceedings of the 2006 IEEE International Symposium on EMC.
November 2006