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    ASSET Joins PCI-SIG

    June 21, 2011
    Evaluation Engineering

    RICHARDSON, TX, June 9, 2011

    ASSET® InterTech, a supplier of tools for embedded instrumentation, has joined the PCI-SIG® and plans to participate in the group’s upcoming interoperability workshops. As a result, manufacturers of PCI Express (PCIe) add-in cards (AIC) will be able to validate that their cards interoperate with the company’s ScanWorks platform for embedded instruments. This ensures that the AIC manufacturer can access Intel’s embedded instrumentation technology, Interconnect Built-In Self Test (IBIST), because ScanWorks is the only tools environment that supports Intel IBIST. Interoperability with Intel IBIST is critical to AIC manufacturers because validating, testing, and debugging PCIe practically requires compatibility to Intel IBIST.

    The PCI-SIG recently released the PCIe 3.0 specification, which doubles the bandwidth of the previous generation to eight gigatransfers per second. As a consequence, real-time validation, test, and debug using the Intel IBIST embedded instrumentation technology is imperative if a manufacturer must assure the functionality and quality of its AICs to the fullest. The PCI-SIG is an independent industry consortium responsible for maintaining and advancing the PCIe architecture.

    “The very high speeds and capacitive sensitivities of PCIe Gen3 are rendering the older probe-based intrusive methods of validation, test, and debug a thing of the past,” said Tim Caffee, ASSET’s vice president of board validation. “In addition, certain failures on circuit boards may only manifest themselves over time, but by powering up the board and testing it nonintrusively and at-speed, the manufacturer often can detect these problems, repair any faulty circuit boards, and alter the manufacturing process accordingly.”

    About ASSET InterTech and ScanWorks
    The ScanWorks platform is a software-based environment that supports multiple embedded instrumentation validation and test technologies. The cumulative coverage provided by these technologies far exceeds that of legacy intrusive methodologies. The ScanWorks validation, test, and debug tools are boundary scan test (IEEE 1149.1 and JTAG 1149.6); processor-controlled test; high-speed I/O validation for the Intel Architecture, including the 22-nm 2nd generation CoreT processor family; and BIST based on embedded instruments that conform to the preliminary IEEE P1687 Internal JTAG (IJTAG) standard.

    The ScanWorks platform provides automation, access and analysis tools in one environment. Users can validate and test semiconductors, circuit boards, or entire systems during every phase of a product’s life, including design, manufacturing/repair, and field maintenance.

    ASSET InterTech is located at 2201 North Central Expressway, Suite 105, Richardson, TX 75080, www.asset-intertech.com

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