The deceleration of Moore’s Law may at some time result in obsolescence-resistant heirloom laptops and smart watches that can be passed on from generation to generation, but that time is far in the future. Meanwhile, Moore’s Law is driving the industry to 10 nm and below, and semiconductor analyst David Kanter marked the 50th anniversary of Moore’s Law with a post in his real world technologies blog on what’s next.

He begins with a historical perspective, looking back to the early 2000s when transistors scaled down quadratically while power density remained constant—in accordance with Dennard scaling.

Subsequently, static (leakage) and dynamic power became a severe problem, with architectural changes such as power gating addressing leakage.

But the biggest steps forward, he writes, have come from new materials and architectures, including strained silicon, high-k gate dielectrics (HfO2) and metal-gate electrodes, double-patterning, and FinFETs.

Now Intel pursuing the 10-nm node. Going forward, he predicts, the industry will adopt quantum-well FETs (QWFETs), with Intel leading the way at 10 nm and others following at 7 nm. QWFETs, he predicts, will operate at 0.5 V, vs. 0.7 V for FinFETs. He also predicts the adoption of strained germanium and III-V materials.

He acknowledges it will be months or years before companies reveal their plans for 10 and 7 nm but that the time is right for insightful, specific, and verifiable predictions.

Read the full post here.