Goepel Variotap Intel Skylake

VarioTAP model libraries support Intel Skylake

Dec. 6, 2015

GOEPEL electronic announced its VarioTAP model libraries now support the sixth generation Intel Core processors, codenamed Skylake. VarioTAP models allow flexible execution of processor emulation tests using the processor’s native debug interface. Therefore, the CPUs can be used as embedded test tools for design validation of prototypes as well as for production test.

The processors with the Skylake microarchitecture were introduced in August 2015 as a successor to the Broadwell architecture. Like their predecessors, they are manufactured in a 14-nm process, thus offering high CPU and GPU performance with reduced energy requirements.

Congatec conga-TC170 module connected to GOEPEL TIC122 TAP interface card

The BGA socket and the new LGA 1151 socket of the Skylake processors typically do not allow direct contact with external instruments. VarioTAP offers embedded instruments for test, hardware debug, and design validation even after mounting, enabling users to accelerate prototyping, shorten time frames for new product introduction (NPI), and ensure the quality of production test with reduced access. GOEPEL realized the development and verification of the VarioTAP models cooperation with Congatec, using the conga-TC170 fanless, sealed COM Express module.

In the context of new product development, GOEPEL electronic has joined the Intel Intelligent Systems Alliance as General Member. Intel Intelligent Systems Alliance is a global ecosystem of 200+ member companies that provide the performance, connectivity, manageability, and security developers need to create smart, connected systems. Close collaboration with Intel enables alliance members to innovate with the latest technologies, helping developers deliver first-in-market solutions.

About the Author

Rick Nelson | Contributing Editor

Rick is currently Contributing Technical Editor. He was Executive Editor for EE in 2011-2018. Previously he served on several publications, including EDN and Vision Systems Design, and has received awards for signed editorials from the American Society of Business Publication Editors. He began as a design engineer at General Electric and Litton Industries and earned a BSEE degree from Penn State.

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