Improved Controllers Poised to Boost Digital Power Conversion Applications

April 1, 2009
Price/performance characteristics of digital signal controllers (DSCs) have reached a design-in milestone with the introduction of Microchip Technology's second-generation dsPIC33 family.

Price/Performance Characteristics of digital signal controllers (DSCs) have reached a design-in milestone with the introduction of Microchip Technology's second-generation dsPIC33 family. These DSCs now provide the flexibility and efficiency levels that should spur greater application of digital power conversion. The DSCs start at approximately $2 each in 5,000-piece quantities for a single-chip,16-bit, 40 MIPS device with supporting peripherals. This brings them into the cost-effective region for power conversion systems. All that remains now is for the power conversion industry to move from analog to digital technology.

This newest generation of Microchip Technology's 16-bit DSCs fills the role of digital power controller for multi-loop power conversion applications. These DSCs provide up to twice the performance at a significantly lower price than the company's first DSC family. These DSCs can be configure for several different topologies, giving designers the freedom to optimize performance for specific product applications. Additionally, the dsPIC33's in-circuit programming capabilities allow common power conversion platforms to be changed late in the production process, saving time and cost.


The DSC's 16-bit (data) modified Harvard RISC processor combines the control advantages of a high-performance 16-bit microcontroller with the high computation speed of a fully implemented DSP. Most instructions require only one clock cycle to execute, and the dsPIC DSC has a fixed deterministic interrupt latency, allowing very predictive, real-time performance.

Fig. 1 shows a block diagram of the new DSC family. Table 1 lists the key features of the seven second-generation dsPIC33F “GS” series DSCs that are pin-compatible with Microchip's first-generation DSC family. The on-chip analog-to-digital converters (ADCs) provide low latency and high-resolution control. The ICs feature interactive peripherals that minimize the intervention of the processor and can handle the real-time demands of high-speed current-mode control. These DSCs are suited for ac-dc converters, dc-dc power converters and other power conversion applications, such as embedded power-supply controllers, power inverters, uninterruptible power supplies (UPSs) and digital lighting. Furthermore, their 1-ns duty-cycle resolution pulse-width modulators (PWMs) can easily handle the precise timing requirements of all switching power supply topologies, including precise multiphase synchronous rectifier timing requirements.

The dsPIC33F family enables full control of the power conversion process via software running on the DSC and through its high-performance and highly configurable integrated peripherals. With these DSCs, designers can eliminate analog-control design constraints. Components do not need to be oversized to account for component aging variations. Component drift and temperature compensation are no longer an impediment, and the DSCs can eliminate manual tweaking at the end of a production line. Relatively few product platforms can serve a wider range of applications, because software rather than hardware controls their operation.

The dsPIC33F “GS” series devices offer 10 modes of PWM operation, including standard, complementary, push-pull, variable-phase and center-aligned. Advanced ADC sampling capabilities include individual triggers for each of the four sample and holds, which allow precise individual or simultaneous sampling modes.

Other features include:

  • 3-V to 3.6-V input voltage:
  • 16-bit CPU with 40 MIPS performance
  • UART, I2C and SPI communications
  • Internal pin remapping to optimize PCB layout via the Peripheral Pin Select function
  • Fast, deterministic interrupt responses
  • -40°C to 125°C ambient temperature operation
  • Flexible configuration of ADCs, comparators and PWMs to handle peak loading without CPU intervention.

Fig. 2 shows the 28-pin dsPIC33FJ06GS202 configured as a single-phase synchronous buck converter. Elements k 1, k2 and k7 are voltage dividers. K7 provides a portion of its 12-V input to an ADC channel so that the DSC can monitor the input voltage. K1 provides a fraction of the load current to an analog comparator that enables monitoring of that current. K2 provides a portion of the output voltage to an ADC that supplies feedback to the DSC, allowing it to maintain a constant output voltage. Two 180° out-of-phase PWM outputs provide the input to the FET driver for the external synchronous rectifier power MOSFETs. Operation of this power supply is completely controlled by the DSC's firmware.

By going to the 28-pin dsPIC33FJ06GS502, you can configure a 3-phase synchronous converter (Fig. 3). This DSC has eight PWM and four analog comparators. The PWM outputs supply FET drivers with the proper phase relationships to drive the external synchronous power MOSFETs. Three of the analog comparators combine with voltage dividers k 3, k4 and k5 to provide the per-phase currents, which the DSC balances to make the three currents equal. One ADC channel monitors the 12-V input via voltage divider k7. Another ADC combines with voltage divider k6 to monitor the output voltage and provide the necessary feedback to maintain a constant output voltage.


These DSCs feature the following software and hardware design support:


  • MPLAB integrated development environment (IDE)
  • MPLAB C compiler
  • MPLAB SIM 30 software simulator
  • MPLAB visual device initializer


  • Explorer 16 development board
  • PICtail Plus daughter board
  • 16-bit, 28-pin starter board
  • Plug-in module (PIM)
  • MPLAB ICD 3 in-circuit debugger.

For advanced development, Microchip's Explorer 16 development board can be used with the PICtail Plus daughter board (Fig. 4). A dsPIC33F “GS” series plug-in module (PIM) is available for the Explorer 16, which enables development with this DSC family. Alternatively, the PICtail Plus can be used with Microchip's 16-bit, 28-pin starter board.

The PICtail Plus daughter board has two independent dc-dc synchronous buck converters and one independent dc-dc boost converter. Board connectors provide all the necessary power, drive and control signals. This board can control two buck stages or one buck and one boost stage via the demo software, running from the onboard dsPIC33 DSC. The Explorer 16 development board can control all three stages of the PICtail Plus daughter board.


An available reference design (Fig. 5) works with the universal ac input voltage range and produces three output voltages. The continuous power output rating of the unit is 300 W. Its front-end power factor correction (PFC) boost circuit converts universal ac input voltages to a 420-Vdc bus voltage.

A full-bridge transformer isolated buck converter, incorporating a phase-shift zero-voltage transition (ZVT) circuit, produces 12 Vdc at 30 A from the 420-Vdc bus. The phase-shift ZVT converter also provides output voltage isolation from the ac mains input. A multiphase synchronous buck converter then produces 3.3 Vdc at 69 A from the 12-Vdc bus, and a single-phase buck converter produces 5 Vdc at 23 A from the 12-Vdc bus.

Reference design features include:

  • Universal inputs (85 V to 265 Vac, 45 Hz to 65 Hz)
  • Boost PFC (PF > 0.98)
  • Soft-start (programmable)
  • Full-bridge ZVT (soft-switching)
  • 12-V intermediate bus
  • Multi-phase synchronous buck converter 3.3-V output
  • Single-phase 5-V output
  • Automatic fault handling
  • Remote power-management capabilities
  • Flexible startup capabilities
  • Greater than 90% efficiency on each of the four power-conversion stages.


GENERALLY, DIGITAL POWER CONVERSION employs a digital processor to control system operation and peripheral support. This can take one of four possible configurations, as seen in Fig. 6. The four possible levels of control in digital power conversion include full digital, topology, proportional and on/off. At the top, Level 4 provides full-loop control provided by on-chip firmware algorithms. At the bottom, Level 1 employs primarily hardware control of power conversion with some software support. Level 4 employs the highest degree of sophistication, particularly with the associated software (firmware), as shown in Fig. 7.

KEY CHARACTERISTICS OF THE DSPIC33F “GS” FAMILYDSC TYPEPINSPACKAGESRAM BYTESFLASH KBPWM10-BIT ADCANALOG COMP.INPUTS MSPS dsPIC33FJ06GS101 18 SOIC 256 6 4 6 2 0 dsPIC33FJ06GS102 28 SDIP, SOIC QFN 256 6 4 6 2 0 dsPIC33FJ06GS202 28 SDIP, SOIC QFN 1 K 6 4 6 2 2 dsPIC33FJ16GS402 28 SDIP, SOIC QFN 2 K 16 6 8 2 0 dsPIC33FJ16GS404 44 TQFP, QFN 2 K 16 6 8 2 0 dsPIC33FJ16GS502 28 SDIP, SOIC QFN 2 K 16 8 8 4 4 dsPIC33FJ16GS504 44 TQFP, QFN 2 K 16 8 12 4 4

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