RC9700 system block diagram
RC9700 read channel chip
LSI's 40nm RC9700 Read Channel chip handles data rates over 4.0Gbits/s with a 10% power reduction in active mode. The chip will find a home in high density, low power hard drives for notebooks, desktop and the enterprise. There is also improved power reduction in sleep mode.
The chip improves signal-to-noise ratio (SNR) in both 512-byte and 4K-byte sector sizes by more than 1.0dB. This is enabled by the full Low Density Parity Check (LDPC) architecture that improves SNR for both sector sizes. It is pin compatible with previous generation chips providing a low risk growth path as areal densities increase. The firmware interface is the same as well. Two versions of the chip are available. One is optimized for low power and targets mobile devices. The other for high speed.
The RC9700 also supports next generation technology for higher storage densities such as Shingled Magnetic Recording and Bit Patterned Media. Shingled Magnetic Recording places the tracks closer together providing higher density. It uses shingled writing with two dimensional read-back. Bit Patterned Media uses special media with magnetic regions that requires higher read/write precision.