In a move to address the growing importance of power and energy efficiency as a selling point for processors, the Embedded Microprocessor Benchmark Consortium (EEMBC) plans to add an energy consumption metric to the performance scores it provides for embedded processors tested against its application-focused benchmarks.
The consortium has formed two working groups to establish methodologies for the energy consumption benchmarks. Shay Gal-On of PMC-Sierra is heading up a group addressing energy measurements for hardware platforms and devices. A group addressing energy measurements using simulation for intellectual property (IP) processor cores is being headed up by Moshe Sheier of CEVA.
The consortium has additionally engaged the services of David Kaeli, associate professor in Northeastern University's Department of Electrical and Computer Engineering and director of its Computer Architecture Research Laboratory, to guide its energy benchmark developments. Kevin Kranen, director of strategic programs at Synopsys, has also been actively involved in this process.
EEMBC's members have agreed that the energy metric will be an optional component of the performance benchmark scores published for each processor and will take into account the energy consumed by the benchmarked devices while running each of the consortium's application-focused benchmark suites. Once the standardized methods are finalized, the details of how EEMBC measures energy consumption will be available for download from www.eembc.org.
"Every processor vendor has its own measurement methods, making it nearly impossible to make accurate comparisons among competing vendors," said EEMBC President Markus Levy. "EEMBC's new power metric will fill this knowledge gap by providing data on how much power and energy a processor consumes when running a real application and not just arbitrarily chosen test vectors."