Improved Semiconductor Processes

Dec. 14, 2004
PolarFab, the only U.S.-owned, pure-play analog and mixed-signal semiconductor foundry, has improved its 6-in. complementary BiCMOS (c-BiCMOS) RFBC/ABC3 processes to provide reduced die sizes and decreased design times. Both processes are used for a ...

PolarFab, the only U.S.-owned, pure-play analog and mixed-signal semiconductor foundry, has improved its 6-in. complementary BiCMOS (c-BiCMOS) RFBC/ABC3 processes to provide reduced die sizes and decreased design times. Both processes are used for a variety of analog and mixed-signal applications, such as low-noise amplifiers, photodetector integrated circuits (PDIC), line drivers and power management.

Three digital cell libraries have been added to the RFBC/ABC3 standard cell library portfolio in order to reduce design times and increase first pass success for designers.

The first library, optimized for synthesis, place and route (SP&R), is a 72-cell library that includes logic (Verilog) and synthesis views.

Users can employ proven SP&R flows to reduce logic circuit design time. The synthesis views are compatible with industry leading EDA tools such as Synopsys and Cadence. A Library Exchange Format (LEF) file for automated place and route tools also is included.

The second library, provided for a schematic-based flow, is a 30-cell, standard cell library, giving designers a more area-efficient alternative to the SP&R library. Lower gate count circuits can be created using proven silicon building blocks, saving time and increasing first pass yield.

The third library is a 10-cell pad cell library that incorporates analog, input, output and bidirectional pad cells and is ESD tolerant up to 2-kV human body model (HBM). The silicon-verified pad cell library works with industry-standard design tools, reducing design times and increasing first pass success for designers.

In addition, PolarFab has added a high-sheet rho (HSR) resistor to its RFBC process, featuring up to 2000 Ω/square to provide reduced die size as well as lower parasitics for high-value resistors. The new HSR resistor also improves bandwidth for amplifier applications.

The RFBC process is a 0.8 µm c-BiCMOS process that supports chips running at speeds up to 1.5 GHz and is suitable for consumer applications requiring high-performance amplifiers. PolarFab’s ABC3 process, also a 0.8 µm c-BiCMOS process, supports chips running at speeds up to 1 GHz and is suitable for a wide range of analog and mixed-signal applications. Both processes can safely handle 10-V supplies and offer a CMOS low voltage rating of 5 V.

For more information, visit www.polarfab.com/cbicmos.asp.

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