Trench Configurations and Packaging Solutions Reduce On-resistance in MOSFETs

Oct. 19, 2005
NEC Electronics America's NP110 power MOSFET features a combination of trench technologies and packaging solutions that result in low leakage current and enable a low on-state resistances (RDS(ON)) of 1.4 mΩ (typical).

The NP Series of power MOSFETS from NEC Electronics America is part of a family of low-voltage switching devices. The NP Series features a combination of trench technologies and packaging solutions that result in low leakage current and enable a low on-state resistances (RDS(ON)) of 1.4 mΩ (typical). The new MOSFETs target markets requiring efficient power management and high current capability, such as automotive and low-voltage motor control. The first device in the series, the NP110, is available now.

By combining the company's UMOS-4 process technology with a trench configuration, NEC Electronics has increased the MOSFET's cell density, resulting in decreased RDS(ON). The UMOS-4 process reduces the size of the trenches and other structures with a 0.25-µm design rule. In addition, by fabricating MOSFET structures along the sides of the trenches, designers can reduce the amount of silicon space required. Together, these technologies achieve a cell density of more than 180 Mcells/sq in. The NP Series also features TO-263 and TO-252 packages fabricated with multi-bonding technology that increases the number of bonding wires from two and three to three and four, respectively. This additional bonding capability enables the MOSFET to manage high currents with very low on-resistance, all in a relatively small package.

Pricing for the NP110 MOSFET starts at approximately $1.85 in 10,000-unit quantities. The NP110 MOSFET also is available in a RoHS-compliant package.

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