What are the application specific power management ICs?
Intelligent Power Switch ICs
Intelligent power switch ICs are employed in applications that include USB ports and peripherals, notebook computers, battery-charger circuits, and hot-swap power supplies. They consist of a power MOSFET and internal circuits that control their turn-on and turn-off. Also, many of these ICs have protection circuits for undervoltage, overtemperature, and overcurrent.
One of these ICs employs a 1.0A current-limited P-channel, MOSFET for high-side load-switching applications. This switch operates with inputs ranging from 2.7V to 5.5V. An integrated current-limiting circuit protects the input supply against large changes in load current that may cause the supply to fall out of regulation. It is also protected from thermal overloads, which limit power dissipation and junction temperatures. The current limit threshold is factory programmed at 1.5A, with a maximum of 2.0A. The quiescent supply current is typically 16µA. In its shutdown mode, the supply current decreases to less than 1µA. This IC is a part of a family of adjustable and fixed products with a range of current handling capabilities. There are single versions with adjustable current limit or fixed current limit as well as dual versions with fixed current limit.
PC Card Power Management ICs
The PCMCIA (Personal Computer Memory Card International Association) consists of members from leading computer, software, PC Card, and semiconductor manufacturers. One key goal is to realize the plug-and-playconcept, so that cards and hosts from different vendors would be transparently compatible. System compatibility also means power compatibility. The most current set of specifications (PC Card Standard) set forth by the PCMCIA committee states that power is to be transferred between the host and the card through eight of the 68 terminals of the PC Card connector. Card primary power is supplied through the VCC terminals; flash-memory programming and erase voltage are supplied through the Vpp terminals.
Cell Phone Power Management ICs
Typical cell phone handsets have 10 or more separate power supplies, usually with an independent low dropout (LDO) regulator. In addition, the phone’s power amplifier (PA) obtains its power from an independent power source, usually a separate dc-dc converter. The power amplifier’s power source must exhibit high efficiency, so it includes an on-chip synchronous rectifier. In addition, it must consume very little power in the shutdown mode. Furthermore, it must employ small surface-mount packages that occupy minimal space.
DDR Memory Termination Supply ICs
DDR memories require terminal regulators, power supplies that minimize timing skew and power dissipation. The voltages involved in this termination process are VDDQ, VTT, and VREF. According to the JEDEC specification: VTT = 0.5 (VDDQ), VREF is a buffered reference voltage that also tracks 0.5(VDDQ) and VTT must track VREF with <40mV offset regardless of variations in voltage, temperature, and noise.
DDR memory systems employ Series Stub Termination Logic (SSTL) that improves signal integrity of the data transmission across the memory bus. This termination scheme is essential to prevent data error from signal reflections while transmitting at high frequencies encountered with DDR RAM. This termination configuration prevents data error from signal reflections while transmitting at the high frequencies associated with DDR memory. It involves the use of the termination regulator and termination resistors that regulate the voltage to 0.5(VDDQ).
Gate Driver ICs
Gate driver ICs are power amplifiers to drive power MOSFETs in power supply applications. Inputs to these gate driver ICs are typically logic levels from PWM ICs. Outputs can be single-ended or dual synchronous rectifier drive. MOSFETs require 1.0A to 2.0A drive to achieve switching efficiently at frequencies of hundreds of kilohertz. This drive is required on a pulsed basis to quickly charge and discharge the MOSFET gate capacitances. Fig. 2-1 shows the a gate driver IC for a power MOSFET.
Gate drive requirements show that the Miller effect, produced by drain-source capacitance, is the predominant speed limitation when switching high voltages. A MOSFET responds instantaneously to changes in gate voltage and will begin to conduct when its gate threshold is reached and the gate-to-source voltage is 2.0V to 3.0V; it will be fully on at 7.0 V to 8.0 V.
Many manufacturers now provide logic level and low threshold voltage MOSFETs that require lower gate voltages to be fully turned on. Gate waveforms will show a porch at a point just above the threshold voltage that varies in duration depending on the amount of drive current available and this determines both the rise and fall times for the drain current.
LCD Power Management ICs
Charge pump, switch-mode and LDO techniques are used by various ICs to power thin film transistor (TFT) liquid crystal displays (LCDs). These ICs usually employ a combination of dc-dc converter technologies to provide the multiple voltages required by an LCD. A typical LCD power management IC may provide +5V, +15V, –15V from a single 3 V input. These voltages are then used to provide 5V for the LCD controller and the gate drives ±15V for the transistors in the LCD panel.
Another type of LCD IC employs a fixed frequency, current mode PWM step-up dc-dc switch-mode regulator with five buffers capable of 12 V boosted output voltage. Each buffer can deliver 35 mA output current and has rail-to-rail input and output capability. It provides high efficiency, low noise operation, and excellent dynamic response. The high switching frequency allows small, cost-saving, external inductive and capacitive components.
LED Power Management ICs
An LED driver must provide the proper forward voltage, which is typically in the range of 3.3V to 4.0V. In addition, these drivers must provide well-matched current sources to ensure the current through all the LEDs is virtually identical. In its simplest drive configuration you can power an LED with a voltage source and current-limiting resistor. Instead, a driver IC can drive LEDs with a constant-current source that regulates their current regardless of power supply voltage variations or variations in forward voltage drops. This produces matched brightness when using multiple LEDs.
LED drivers supply current to either parallel or series-connected devices (Fig. 2-2). When driving series-connected converters the LED driver IC must supply enough voltage to accommodate the number of LEDs in a string. Thus, driver ICs for series-connected LEDs usually step-up their applied voltage. Parallel LED drivers provide only the voltage required by a single LED, but each output must be capable of providing the appropriate constant current.
Power Factor Correction ICs
Most electronic systems use ac-dc switch-mode power converters that draw current from the powerline in a non-sinusoidal fashion that produces current and voltage distortions that can create problems with other equipment on the powerline.
Power factor describes the power relationships on an ac powerline . Current and voltage distortions occur with a reactive load, which has a real and a reactive power component. The vector sum of these two power components is the apparent power to the load. The phase angle between the real power and reactive power is the power factor angle. With a resistive load, the reactive power is zero and the apparent power equals the real power and the power factor is unity, or 100%. If the load is reactive, the power factor is lower (less than 100%).
For a nonlinear load with a distorted current waveform, the current consists of fundamental line frequency and various harmonics. These harmonic currents do not contribute directly to the useful power dissipated in the load, but rather adds to the reactive power to create a higher value of apparent power. Total harmonic distortion, THD, is a common way of specifying and measuring the amount of distortion present on a waveform. Note that THD can be higher than 100%.
Most commonly used techniques for power system electronics incorporate a power factor correction (PFC) circuit ahead of the other electronics on the assembly. An example would be the PFC correction circuitry on the front-end of an off-line ac-dc power converter. In addition, most systems that employ an active PFC utilize feedback circuitry along with switch-mode converters to synthesize input current waveforms consistent with high power factor.
The boost topology is the most popular PFC implementation. Almost all present day boost PFC converters utilize a standard controller chip for the purposes of ease of design, reduced circuit complexity and cost savings. These ICs greatly simplify the process of achieving a reliable high-performance circuit. In order for the converter to achieve power factor correction over the entire range of input line voltages, the converter in the PFC circuit must be designed so that the output voltage is greater than the peak of the input line voltage
Power Over Ethernet (PoE) ICs
The IEEE 802.3af Standard states that all data terminal equipment (DTE) now have the option to receive power over existing cabling used for data transmission. The IEEE 802.3af Standard defines the requirements associated with providing and receiving power over the existing cabling. Fig. 2-3 shows a typical Power-Over-Ethernet configuration. The power sourcing equipment (PSE) provides the power on the cable and the powered device (PD) receives the power. As part of the IEEE 802.3af Standard, the interface between the PSE and PD is defined as it relates to the detection and classification protocol.
A powered device (PD) draws power or requests power by participating in a PD detection algorithm. This algorithm requires the power sourcing equipment (PSE) to probe the link looking for a valid PD. The PSE probes the link by sending out a voltage between 2.8 V and 10 V across the power lines. A valid PD detects this voltage and places a resistance of between 23.75 kW and 26.25kW across the power lines. Naturally, the current varies depending on the input voltage. Upon detecting this current, the PSE concludes that a valid PD is connected at the end of the ethernet cable and is requesting power.
If the powered device (PD) is in a state in which it does not accept power, the PD is required to place a resistance above or below the values listed for a valid PD. On the lower end, a range between 12 kW and 23.75 kW signifies that the PD does not require power. On the higher end, the range is defined to be between 26.25 kW and 45 kW. Any resistance value less than 12 kW and greater than 45 kW., is interpreted by the PSE as a non-valid PD detection signature.
After the detection phase, the PSE can optionally initiate a classification of the PD. The classification of a PD is used by the PSE to determine the maximum power required by the PD during normal operation. Five different levels of classification are defined by the IEEE 802.3af Standard.
Classification of the PD is optionally performed by the PSE only after a valid PD has been detected. To determine PD classification, the PSE increases the voltage across the power lines to between 15.5V and 20.5V. The amount of current drawn by the PD determines the classification.
Upon completion of the detection and optional classification phases, the PSE ramps its output voltage above 42V. Once the UVLO threshold has been reached, the internal FET is turned on. At this point, the PD begins to operate normally and it continues to operate normally as long as the input voltage remains above 30V. For most PDs, this input voltage is down-converted using an on board dc-to-dc converter to generate the required voltages.
Designers can still supply power in a limited fashion in some existing Ethernet installations via a mid-span bridge. But in that case, designers can’t implement power negotiations between a powered device (PD) and power source equipment (PSE). This implies dedicated PoE Plus ports and relatively high duty-cycle power supplies in midspans.
Something else to watch out for are PDs that dynamically negotiate power requirements with the PSE via their Ethernet connection. This requires more code in the PD micro-controller and a greater understanding of dynamic power requirements on the part of the engineer writing that code.
The original 802.3af PoE standard offered a fairly straightforward way to supply loads with up to 13 W of usable power delivered at 48 V dc. But IEEE 802.3at PoE Plus ups usable power to something over 50 W, and introduces some wrinkles that designers and even IT managers must understand.
Voltage Reference ICs
Voltage reference provide an accurate, temperature compensated voltage source for use in a variety of applications. These devices usually come in families of parts that provide specific accurate voltages. Some families can have up to six different values with output voltages ranging from 1.225V to 5.000V. Initial output voltage accuracy and temperature coefficient are two of the more important characteristics.
Voltage references are available with fixed and adjustable reference voltage outputs. Adjustable output is set by a resistor divider connected to a reference pin. These references are either shunt (two-terminal) or series (three-terminal) types.
The ideal voltage reference has a perfect initial accuracy and maintain its voltage output independent of changes in temperature, load current, and time. However, the ideal characteristics are virtually impossible to attain, so the designer must consider the following factors:
Shunt references (Fig 2-4) are similar to zener diodes in operation because both require an external resistor that determines the maximum current that can be supplied to the load. The external resistor also sets the minimum biasing current to maintain regulation. Consider shunt references when the load is nearly constant and power supply variations are minimal.
Series references (Fig. 2-5) do not require any external components and they should be considered when the load is variable and lower voltage overhead is important. They are also more immune to the power supply changes than shunt references.
VRM/VRD Power Management ICs
The Voltage Regulator Module (VRM) concept was developed by Intel to guide the design of dc-dc converters that supply the required voltage and current to a Pentium® microprocessor. The maximum voltage is determined by the five- to-7-bit VID (Voltage Identity) code provided to the VRM. The VID code connects the power supply controller to the corresponding pins on the microprocessor (Fig 2-6). Therefore, the internal coding in the microprocessor controls the dc voltage applied to processor. VRM guidelines are intended for a special module, usually a small circuit board, that plugs into the computer system board and supplies power for the microprocessor.
A later version of guidelines are for a similar circuit called the Voltage Regulator-Down (VRD) developed by Intel to guide the design of a voltage regulator integrated onto the computer system motherboard with a single processor. These guidelines are based on the six-bit VID code.
At the present time and in the near future the VRM and VRD circuits must provide 60A to 100A for the Intel microprocessors. At this time, the only practical circuit that can provide those current levels is the multiphase configuration. Multiphase converters employ two or more identical, interleaved converters connected so that their output is a summation of the outputs of the cells.