Nonvolatile memory (NVM) intellectual property (IP) supplier Impinj has developed what it calls the first available NVM IP based on floating-gate technology with 2.5V transistors. Dubbed AEON/MTP, the memory has been silicon-verified in Taiwan Semiconductor Manufacturing Co.’s (TSMC’s) 65-nm LP process, a semiconductor technology that leverages Impinj’s design expertise and TSMC’s advanced manufacturing capability. The 65 nm AEON/MTP is available in 32-bit to 8-kb configurations and specifies a 15,000 write-cycle endurance, 10-year data retention, and an operating temperature range from -40 to +125°C.