Wireless Systems Design

Integrated Platform Speeds Verification

Design teams must spend a lot of time and resources verifying their chip or system designs. This added pressure is fueling the search for true electronic-system-level (ESL) verification. So far, electronic-design-automation (EDA) companies are taking varied approaches to ESL. For ZAiQ Technologies, Inc. (www.zaiqtech.com) and Emulation and Verification Engineering (www.eve-team.com), the answer may lie in the integration of their solutions.

By integrating ZAiQ's SYSTEMware and EVE's ZeBu, the two companies have produced a transaction-based verification platform (see figure). ZeBu, which stands for Zero Bugs, is a hardware-assisted verification platform. It is used to accelerate the verification process of application-specific integrated-circuit (ASIC) and field-programmable gate-array (FPGA) designs. It also speeds the software-development cycle for embedded-software designs. When ZeBu is installed on a designer's desktop, it promises to provide the same hardware-debugging capabilities as high-end emulation systems at a higher speed and at a fraction of the cost.

The other half of this collaboration is ZAiQ's SYSTEMware. It provides designers with a pre-configured, rapidly usable, transaction-based system-level verification environment for complex designs. To allow designers to comprehensively and efficiently test those designs, it comes with an extensive library of verification intellectual property (IP).

In addition, SYSTEMware offers a transaction-based verification environment running on the ZeBu system. This environment utilizes the Accellera standard, known as Standard Co-Emulation Application Programming Interface (SCE-API). ZAiQ's verification intellectual property, which is called SYSTEMware Verification Components (SVCs), supports the SCE-API down to the synthesizable bus-functional-model (BFM) level. SYSTEMware Verification Components are available for standard interfaces and protocols like AMBA, Universal Serial Bus (USB), and Ethernet.

The resulting integrated tool claims to accelerate verification by up to five orders of magnitude over pure logic simulators. Take the case of a network processor system-on-a-chip (SoC) containing 550,000 ASIC gates and 2.5 million bits of random-access memory (RAM). Here, ZeBu/ZAiQ achieved up to 100,000 times speed-up. Most tests were said to be in the range of 1000 to 10,000 times faster. The companies note that acceleration generally varies with the type and size of the design and test suite.

The companies have entered into a value-added-reseller (VAR) agreement that allows EVE customers to order the integrated ZeBu and SYSTEMware solution directly from EVE. They also can use off-the-self standard transactors from ZAiQ's SYSTEMware library of SVCs. The pricing for ZeBu/SVC starts at $66,600. It is shipping now.

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