Electronic Design

Mentor, TSMC Release 65nm RF Design Kit

Mentor Graphics and TSMC have released a 65nm RF design kit that combines TSMC's 65-nm mixed-signal and RF process technology with Mentor’s new ICStudio custom chip design platform. The kit covers both mixed-mode and logic sub-processes, and features devices like High-Q inductors, MiM and Metal fringe capacitors, Deep N-Well isolation and multiple Vt devices for added flexibility and coverage. It also includes a packaged RF flow tutorial that takes an RF circuit design from schematic capture through RF simulation, layout and post-layout simulation. It illustrates the flow between analog design tools, foundry process information and design methodology. TSMC’s 65nm process is fully logic-compatible with both copper interconnect and low-K dielectrics on a 9-layer metal process with a core voltage of 1.2 volts and I/O voltages of 1.8, 2.5 and 3.3 volts. Mentor’s new ICstudio custom IC design platform integrates its chip design tools into a flow that allows designers to conceptualize, capture, simulate, lay out, and verify challenging custom, analog, RF, and mixed-signal designs. The design kit is available through TSMC's Web site.

Hide comments


  • Allowed HTML tags: <em> <strong> <blockquote> <br> <p>

Plain text

  • No HTML tags allowed.
  • Web page addresses and e-mail addresses turn into links automatically.
  • Lines and paragraphs break automatically.