DFM Optimization Tool Drives Design Requirements To The Fab

June 22, 2006
Relying on a design’s power and timing requirements to influence manufacturing, a DFM tool provides tailored guidance to the design-to-mask-creation flow.

The idea behind design-formanufacturing (DFM) products has been to bring design and manufacturing closer together. Yet designers look at the world based on performance, power consumption, and cost targets. They don't overtly concern themselves with manufacturing, and they take a dim view of any disruptive additions to their workflow or changes to how designs are handed off to physical design.

However, lots of things in the manufacturing process can directly impact critical performance-related parameters. Few EDA tools give designers the wherewithal to influence the outcome of manufacturing with respect to their design targets, though. Startup Blaze DFM thinks its flagship product, Blaze MO, can change all that.

The company's approach to DFM sidesteps many potential pitfalls linked to today's DFM approaches. While competing products approach the issue of ensuring manufacturability from a geometric-or shape-centric perspective, Blaze MO is called an "electrical DFM" tool. In the design flow, it sits at the handoff point between physical verification and reticleenhancement-technology/optical-proximitycorrection (RET/OPC) tools (Fig. 1).

OPC tools will always try to hit a critical target dimension for each feature, but they'll generally shoot for the same target for all transistors across the chip. From the design-flow side, Blaze MO accepts a layout, a netlist, and the timing and power constraints. This input combines to represent the design intent from an electrical, performance-based point of view (Fig. 2).

The tool processes that information to pass along specific, transistor-by-transistor targets to the RET/OPC flow. So where the OPC tool might have been solving for 90 nm on a given transistor, it might instead solve for 88 nm if a particular gate isn't meeting timing. All adjustments are done within the allowable process range, and optimizations are made for power and timing simultaneously.

The optimizations bring sizable benefits in terms of leakage power. A curve plotting leakage and delay against gate length shows that a very small change in gate length can result in a major savings in leakage. The tool makes millions of such decisions in a given large IC.

The final step occurs at the output, as the GDSII file receives an extra layer of data carrying the instructions for RET/OPC tools. These annotations, used by foundries in their design kits, come in as modifications to OPC scripts.

Blaze MO is built on the OpenAccess industry-standard database and integrates easily into design flows from Cadence, Synopsys, and Magma. Its output can be used to drive any commercially available OPC tool. The tool is available now for various platforms. Contact Blaze DFM for pricing details.

Blaze DFM Inc.

About the Author

David Maliniak | MWRF Executive Editor

In his long career in the B2B electronics-industry media, David Maliniak has held editorial roles as both generalist and specialist. As Components Editor and, later, as Editor in Chief of EE Product News, David gained breadth of experience in covering the industry at large. In serving as EDA/Test and Measurement Technology Editor at Electronic Design, he developed deep insight into those complex areas of technology. Most recently, David worked in technical marketing communications at Teledyne LeCroy. David earned a B.A. in journalism at New York University.

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