Realize The Wireless Connectivity Vision

June 1, 2003
Wireless connectivity continues to grow. It promises to eradicate the information barriers of the wired world. Yet a big gap still exists between today's wireless technology and tomorrow's vision of ubiquitous information that's available anytime,...

Wireless connectivity continues to grow. It promises to eradicate the information barriers of the wired world. Yet a big gap still exists between today's wireless technology and tomorrow's vision of ubiquitous information that's available anytime, in any form, and anywhere. For the best and most efficient way to overcome these persistent challenges, designers and the electronic-design-automation (EDA) community should work together.

For wireless-system designers, today's most pressing areas break down into three general sections: streamlining the integration of RF and mixed-signal designs; maximizing battery life in low-power systems; and managing increasingly complex software-development requirements. In each of these areas, emerging tool and methodology developments hold great promise for realizing the wireless-connectivity vision.

By definition, wireless design requires a mix of radio-frequency (RF), analog, and digital circuitry. The RF/mixed-signal portion is becoming increasingly important because of the growth in data applications. Its circuitry represents a subsection of the design. Yet this subsection is absolutely critical to the wireless application's overall operation. It is responsible for the RF signal's crucial conversion to electrical analog input and finally to digital signals for digital signal processing. When designing a wireless system, the challenge is to ensure that this multi-stage conversion process works smoothly for both incoming and outgoing signals.

How does a system designer validate such a design—especially if the circuitry is all on one piece of silicon? Plenty of simulation tools exist for each discrete stage of the conversion process. But simulating the overall signal path from RF to digital and vice versa is much more problematic. Moreover, system designers need a way to assess the optimized analog/mixed signals' effect on the digital signal and vice versa.

As wireless systems absorb more functionality, system designers want to explore possible configurations as early as they can in the design cycle. If they were able to easily make tradeoffs across the digital-/analog-/RF-signal boundaries, these designers could quickly reach an optimal balance of performance, size, and cost requirements for a particular application. This capability would be especially useful when creating consumer wireless designs on tight budgets and schedules.

EDA and wireless designers are working hard to improve the integration of the RF design with the rest of the wireless-system development. In fact, this year's Design Automation Conference (DAC) specifically addressed the design challenges of wireless-system design, including simulation and optimization needs. A special session on this topic included papers on seamless multi-radio integration, RF-system-on-a-chip (SoC) design, and new techniques for the nonlinear behavioral modeling of microwave/RF ICs.

In addition to RF and mixed-signal integration, managing power is a top concern for the creators of next-generation wireless systems. Consumers are demanding ever more capability while expecting longer uptime from their wireless devices. To extend battery life in the face of increasing complexity, designers must pay close attention to low-power requirements across the entire system design. They must look from the RF to the digital portions of the design, as well as from the circuit level to the system architecture.

At the circuit level, designers have the help of EDA technologies. These technologies are pursuing ever-smaller device geometries to accommodate growing system capabilities. However, more circuits mean more power dissipation. To get around that problem, the CMOS devices must become more power efficient. As a result, the supply voltage should be optimized and the transistor threshold voltage should be lowered. A new challenge is then spawned: to create circuits that can operate at low voltages but still retain correct electrical behavior with lower signal swings and threshold voltages.

At the logic level, designers are starting to rely on techniques like clock gating and dynamic voltage scaling. These approaches can be used to either turn off the circuitry sections that are not being used or vary voltage levels to dynamically trade off power and performance. When performance is critical, for example, the voltage levels are raised. Once performance requirements are no longer vital, the voltage level can be lowered to conserve power.

At the highest level of design abstraction, system designers can build in hardware support. Such support enables the operating system (OS) to manage the dynamic power-management structures, thereby optimizing the power expenditure with respect to the system's overall desired performance. The software itself can be optimized to promote more efficient memory accesses and other techniques. By relying on a combination of these device-/logic-level and architectural-run-time techniques, system designers can get a much firmer grasp on power management.

Of course, power was a "hot" topic at DAC this year. The conference had seven sessions devoted to exploring the many different aspects of power management. They ranged from managing leakage power and power-grid analysis to energy-aware system design and low-power embedded-system design. The full-day tutorial titled, "Design Techniques for Power Reduction," covered the entire gamut of power-management techniques and the capabilities and limitations of existing tools for power analysis and optimization.

Software is the third crucial area that is currently challenging wireless-system designers. More functionality is being added to wireless systems. This functionality is being supported in software running on general- and/or special-purpose processors. The complexity of software design is therefore increasing. This is especially true in the area of concurrent execution. Wireless-system designers are working hard to determine the optimal design platforms for their particular wireless application. To achieve maximal performance and power efficiencies, they are evaluating the processor and OS as well as the programming environment.

Memory is a growing bottleneck for achieving higher performance and lower power consumption. To improve the behavior of embedded software, emerging approaches and EDA tools optimize all parts of the memory subsystem: caches, on-chip memory, and off-chip DRAM memory. An entire DAC session covered developments like smart memories, which contain computational capability. They optimize cache behavior through cache architecture and data layout in memory and techniques, thereby exploiting off-chip DRAM access models.

On the operating-system side, wireless designers are grappling with the fact that commercially available OSs are not created with wireless applications in mind. Designers are faced with two unattractive choices: They can compromise the performance of a design by adopting a third-party OS or roll their own. As everyone knows, however, creating a custom OS could appreciably add to the design burden. Wireless-system designers need an off-the-shelf OS that provides the services required for wireless applications. The ideal OS needs to provide much tighter control of resource management—including processor scheduling—than the OSs that are generally available.

An efficient software design environment also is required. It should come with a full complement of tools, such as debuggers and compilers, for the highly tuned processors that are now being incorporated into next-generation wireless systems. In addition, a need is emerging for true hardware/software co-simulation capabilities. The system-level designer needs to simulate the complex interactions between hardware and software. These capabilities also can help manage the increasingly complex software design environment.

Although the challenges facing wireless-system designers are formidable, they are not invincible. By working closely together, the EDA community and wireless designers are making major headway in integrating RF and mixed-signal design, reducing power requirements, and better managing the rising software complexity. Indeed, this year's DAC was proof positive of the effectiveness of such a combined effort. It showed all of the innovative resources, technologies, and tools being developed to hasten the fulfillment of the wireless vision.

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