Physical Verification Suite Tuned For IBM’s 65-nm Design Kits

March 22, 2007
Advanced device parameter measurement functionality is now available in the Hercules Physical Verification Suite (PVS) from Synopsys. Developed to support the latest release of 65-nm design kits from IBM, this functionality enables IBM foundry customers u

Advanced device parameter measurement functionality is now available in the Hercules Physical Verification Suite (PVS) from Synopsys. Developed to support the latest release of 65-nm design kits from IBM, this functionality enables IBM foundry customers using the Hercules layout-versus-schematic (LVS) rule files in the kit to easily and accurately correlate device behavior to the IBM process.

These IBM foundry customers also have access to the latest Hercules design rule checking (DRC) as part of the 65-nm design kit release. These files are qualified for accuracy and optimized for performance.

As device geometries continue to shrink to 65 nm and smaller, circuit performance is improved by changing transistor behavior through the application of special process layers. However, the presence of these layers increases the complexity of measuring device parameters such as speed, power, and area during physical verification due to the number of complex calculations involved. IBM and Synopsys have collaborated to deliver the algorithms necessary to support these new requirements. This entailed adding more device measurement commands to Hercules PVS. These new Hercules commands, which are fed into IBM’s proprietary calculations, deliver greater accuracy so customers can better understand design performance at 65 nm.

The new capability for Hercules PVS is available now.

For more information, visit http://www.synopsys.com

About the Author

David Maliniak | MWRF Executive Editor

In his long career in the B2B electronics-industry media, David Maliniak has held editorial roles as both generalist and specialist. As Components Editor and, later, as Editor in Chief of EE Product News, David gained breadth of experience in covering the industry at large. In serving as EDA/Test and Measurement Technology Editor at Electronic Design, he developed deep insight into those complex areas of technology. Most recently, David worked in technical marketing communications at Teledyne LeCroy. David earned a B.A. in journalism at New York University.

Sponsored Recommendations

Comments

To join the conversation, and become an exclusive member of Electronic Design, create an account today!