Tool Ferrets Out Analog/RF Circuit Noise

May 5, 2008
Device noise is insidious to gigahertz, nanometer-scale analog, and RF CMOS circuit performance. In the past, it’s been either impractical or outright impossible to perform transistor-level analysis of the impact of device noise for many complex analog an

Device noise is insidious to gigahertz, nanometer-scale analog, and RF CMOS circuit performance. In the past, it’s been either impractical or outright impossible to perform transistor-level analysis of the impact of device noise for many complex analog and RF circuits including sigma-delta ADCs, video DACs, fractional-N PLLs, frequency synthesizers, and wideband VCOs. Design teams have had to rely on hand calculations, system-level models, or costly silicon measurements.

So analog/RF designers should be heartened by the availability of Berkeley Design Automation’s Noise Analysis Option, billed as the industry’s first comprehensive noise-analysis tool for complex analog and RF circuits. The tool handles every type of complex analog and RF circuit, including all ADCs, PLLs, dc-dc converters, frequency synthesizers, and VCOs. Leveraging Berkeley DA’s fast-Spice technology, the Noise Analysis Option is fully compatible with existing flows, produces true Spice-accurate results, and is already silicon proven.

The tool’s transistor-level noise analysis includes analysis of the impact of white and flicker noise with true Spice accuracy for every type of circuit. Other functions include:

  • Transient-noise analysis that’s five- to ten-times faster and five- to ten-times higher capacity than any other tool.
  • Periodic steady-state (PSS) convergence with up to 50,000 element capacity.
  • Periodic-noise (pnoise) analysis that has no accuracy/performance tradeoff and is five- to ten-times faster than any other tool for complex circuits.
  • Oscillator phase noise (oscnoise) analysis that delivers unmatched accuracy on autonomous circuits, provides node and device noise contribution, and automatically provides impulse sensitivity function (ISF) information for every node.

The tool reads standard Cadence Spectre and Synopsys HSpice netlists and models. It is fully integrated into Cadence Virtuoso Analog Design Environment and can operate from a command line. It produces standard output formats and includes sophisticated post-processing.

Contact Berkeley Design Automation directly for pricing and delivery information.

Berkeley Design Automation
www.berkeley-da.com

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