VHDL 2008: Just The New Stuff

Jan. 7, 2008
By Peter Ashenden and Jim Lewis

I can hear some of you asking the question already: “VHDL? That’s still around?” Essentially relegated to the status of Verilog roadkill in the HDL wars back in the 1980s, the VHSIC Hardware Description Language was nonetheless adopted as IEEE Standard 1076 in 1987. Despite its origins in the U.S. Department of Defense, VHDL really found its niche with European ASIC designers, who were fond of its system-level capabilities. That’s where it has seen most of its loyalty in the ensuing years.

Despite the perception that VHDL was left to wither on the vine since the advent of SystemC and SystemVerilog, the language has continued to see revision and updating. With the latest revision, informally called VHDL-2008, about to gain the IEEE’s final blessing, renowned VHDL experts Peter Ashenden and Jim Lewis have published a book that’ll bring VHDL users up to snuff with the changes in the language.

The book takes a tutorial point of view, giving users (as well as EDA tool developers) a tour of the new features in VHDL-2008 without making them slog through all the details of the VHDL Standard Language Reference Manual. There’s actually quite a bit of ground to cover—everything from enhanced generics to type-system changes is here, as are new and changed operations and statements.

For those coming to VHDL for the first time, it might not be the best starting place. But for those users who are already familiar with the language, this is an ideal source for “the new stuff” in VHDL-2008.

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