Mixed-Signal ICs Keep SONET/SDH Networks Synchronized

Dec. 1, 2000

Using mixed-signal technology, the ACS8510 chip provides the Synchronous Equipment Timing Source (SETS) for generating SONET or SDH equipment clocks (SEC) and frame synchronous pulses. Targeted at central clock synchronization cards, the SETS device generates clocks that, optionally, can feed a downstream IC, the ACS8515, residing on each line card for monitoring, selecting and switching between master and slave clock sets. By synthesizing the output clocks, the configurable IC eliminates the need for temperature calibration required by existing synchronization cards.
Suitable for Stratum 3, 3E and 4 SONET or SDH SEC applications, the ACS8510 supports free-run, locked and holdover modes of operation in accordance with ITU G.812/813 specs, as well as supporting all three types of reference clock sources: recovered line clock (TIN1), PDH network sync timing (TIN2), and node sync (TIN3). The chip supports 14 independent input reference clocks at spot frequencies ranging from 8 kHz up to 155 Mb/s and generates 11 PDH- and SONET-rate reference clocks from 1.544 to 155.52 MHz. The SETS IC comes packaged in TQFP-100s costing $130 each/1,000.
The ACS8515 IC is designed to provide "hit-less" protection switching of SEC clocks from master and slave SETS clock cards. It comes in a TQFP-64 package costing $65 each/1,000.


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