Emulator Provides 100% Visibility Into Designs

Aug. 1, 1999

Users of VirtuaLogic 2.1 are promised 100% visibility into their designs, 3X to 5X design compilation speed improvements, and the ability to offload FPGA compile steps onto PCs and/or UNIX workstations. The 100% visibility feature allows users to gain a level of visibility into the design that is typically obtained only with software simulators. Yet, users can achieve the performance benefits of an emulator at rates of 1 million cycles per second, it's claimed. In addition to improved compilation, users can also farm out FPGA compilation to PCs as well as UNIX workstations, or they can use a combination of multiple platforms. Version 2.1 of VirtuaLogic is available to firm's customers under maintenance at no additional cost.

Sponsored Recommendations

Comments

To join the conversation, and become an exclusive member of Electronic Design, create an account today!