Thanks to an interconnect-synthesis approach, the RioMagic chip design and optimization suite lets designers account for the way signals leave an IC package, ensure their routability, and analyze those signals' electrical fidelity.
RioMagic analyzes a range of variables to converge on a final I/O plan for an IC design, making simultaneous tradeoffs between chip and package design.
With RioMagic, IC designers can develop optimized I/O strategies for their chips and packages using a chip/package co-design flow that begins during initial IC floorplanning. Later, RioMagic can be reused when there are changes in the design to validate the initial I/O plan or to re-optimize it using an updated set of design criteria.
A unified data model represents relevant data for the chip and package. This model facilitates optimization by bringing all design elements into the synthesis flow, which means the entire chip and package can be represented simultaneously. The industry-standard OpenAccess database unifies the data model.
Along with physical implementation, RioMagic offers extraction and analysis capabilities that can approximate signal performance from specific drivers on the chip to the package's ball-grid contacts.
RioMagic runs under the Linux operating system. A three-year time-based license costs $199,000/year.
Rio Design Automation
www.rio-da.com