Physical IC Implementation Tool Arrives In Production-Hardened Version

Feb. 18, 2002
Version 2.0 of Monterey Design's Dolphin physical IC implementation system has everything designers need to complete IC implementation in a single tool. The result is a significantly simpler design flow. Dolphin 2.0 offers more than 30 new...

Version 2.0 of Monterey Design's Dolphin physical IC implementation system has everything designers need to complete IC implementation in a single tool. The result is a significantly simpler design flow.

Dolphin 2.0 offers more than 30 new features. These include engineering-change-order capabilities, interactive wire editing, built-in silicon-correlated extraction, automatic clock-skew management, crosstalk-aware timing analysis, and crosstalk-driven routing.

While prior versions were considered to have a strong technology foundation, the latest release benefits from extensive beta and regression testing. Its developers ran a suite of 29 previously taped-out customer designs through the tool successfully.

Dolphin implements a global design methodology that begins at a high level of abstraction, optimizing all aspects of the design before moving to the next level of detail. This chain of successive refinement continues down through detailed implementation.

The tool now offers a fast and accurate timing-analysis engine that supports analysis of crosstalk-induced delay. It performs automatic performance-versus-accuracy tradeoffs through a process of continuous model refinement. This results in sign-off of quality based on silicon-calibrated extraction with good correlation to Synopsys' PrimeTime tool.

Silicon-correlated extraction is based on characterized silicon and a 3D field solver. The extraction capability provides dynamic accuracy, with an early phase characterized by simple, pessimistic models; a middle phase that relies on models based on actual wiring densities; and a late phase that produces 2.X-D models with full neighboring effects. Future releases of the tool will also support inductance extraction.

Dolphin 2.0 includes automatic IR drop analysis. It performs accurate extraction of the power network, modeling it in MRICE. At the physical prototype stage, its thermal color map indicates the level of IR drop in each area of the chip. Users can then perform GUI-driven power-grid optimization.

Shipping now, Dolphin 2.0's production release is supported on 32- and 64-bit Sun and HP workstations. Pricing starts at $400,000 per year.

Monterey Design Systems, (408) 747-7370; www.montereydesign.com.

About the Author

David Maliniak | MWRF Executive Editor

In his long career in the B2B electronics-industry media, David Maliniak has held editorial roles as both generalist and specialist. As Components Editor and, later, as Editor in Chief of EE Product News, David gained breadth of experience in covering the industry at large. In serving as EDA/Test and Measurement Technology Editor at Electronic Design, he developed deep insight into those complex areas of technology. Most recently, David worked in technical marketing communications at Teledyne LeCroy. David earned a B.A. in journalism at New York University.

Sponsored Recommendations

Comments

To join the conversation, and become an exclusive member of Electronic Design, create an account today!