Next-Generation Hardware Accelerator Sports Up To 512M ASIC Gates

The first fruits of EVE's acquisition earlier this year of Tharas Systems is the ZeBu-AX next-generation hardware accelerator. Designed for ease of use, it offers close to unlimited capacity as well as plug-and-play, event-accurate mixed-language simul

David Maliniak

April 12, 2007

2 min read

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The system provides scalable capacity of up to 512 million ASIC gates. Its one-pass compilation executes at 125 million ASIC gates/hour on a single workstation, mapping onto the accelerator the design under test and a significant portion of the behavioral testbench. The fully automatic process doesn't require user intervention.

The accelerator can be used either in an iterative, design-debug mode or in the regression-testing phase of the project cycle. Hardware is implemented as a very-long-instruction-word (VLIW) machine that executes multiple hardware description language (HDL) operations in a single cycle. This machine is controlled by a sequencer that can execute test/branch/run/loop operations for conditional control. ZeBu-AX takes HDL descriptions and generates code for the sequencer and VLIW machine.

Its single-kernel runtime environment works in co-simulation with the Synopsys VCS, Mentor Graphics QuestaSim, or Cadence NC-Sim simulators. It accelerates simulation from 10 to 1000 times faster than any HDL simulator. ZeBu-AX can manage especially large designs that are typical of graphics and processor designs that most HDL simulators cannot support.

ZeBu-AX supports the RedHat and Suse Linux platforms as well as the VCS, NC-Sim, and ModelSim software simulators. Pricing starts at $100,000.

EVE
www.eve-usa.com

About the Author

David Maliniak

MWRF Executive Editor

In his long career in the B2B electronics-industry media, David Maliniak has held editorial roles as both generalist and specialist. As Components Editor and, later, as Editor in Chief of EE Product News, David gained breadth of experience in covering the industry at large. In serving as EDA/Test and Measurement Technology Editor at Electronic Design, he developed deep insight into those complex areas of technology. Most recently, David worked in technical marketing communications at Teledyne LeCroy. David earned a B.A. in journalism at New York University.