I’m a typical technology-obsessed engineer. I could walk for hours through places like Tokyo’s Akihabara area exploring the latest and greatest consumer electronics devices. It can even be difficult to drag me out of the local big-name electronics store when the latest round of gadgets arrives. It’s always a thrill to see the new and fascinating ways that manufacturers have leveraged technology to create gadgets in an attempt to meet every human need. I’ve come across a few that meet some needs I didn’t realize I had until I saw the device that met them.
It’s this innate gadget freak in me that gets the most excited about the potential innovations that could take place with the adoption of transaction-level modeling (TLM) 2.0 standard from the Open SystemC Initiative (OSCI). TLM 2.0 holds the promise of unleashing a wave of new designer productivity as this new, neatly defined interoperability standard gets adopted. It offers a way for system models, intellectual property (IP) models and system-level design tools used in SystemC-based SoC design flows to work together.
Groundbreaking technologies like TLM 2.0 are transforming the electronic system-level (ESL) from the realm of skunkworks projects and research labs into a mainstream development methodology for system-on-a-chip (SoC) designs.
TLM is hardly a new concept. It has been used by designers for years to model systems, explore architectures, and construct virtual platforms for software development and functional verification. Typically, however, these TLMs were orphaned with each new design generation. Far too often, the investment to create the models was lost as future generations used interfaces that were incompatible with their predecessors. TLM 2.0 offers a welcome change from this methodology by introducing a broadly accepted standard interface. This standard promises to greatly simplify the reuse of IP across designs and also across companies.
Many SoC manufacturers like to claim that reused components comprise 80% or even 90% of their designs. Talk privately to the engineering teams, however, and they’ll tell you that the real number rarely makes it above 50%. That’s because the current barriers to design reuse are simply too high.
Any piece of SoC IP has a hardware design component and a corresponding software component. In fact, for some IP blocks, the software component of a module is substantially larger than the hardware on which it depends. The interplay of hardware and software that is so vital to making the device function is also its biggest barrier to reuse. The integration task of pulling together multiple reused blocks is often times more complex than simply designing a new block.
TLM 2.0 is enabling a new generation of virtual platform models and promise to deliver a fully-functioning virtual prototype of the system on every software engineer’s desk well in advance of silicon. Truly reusable virtual hardware components running together in an easily assembled virtual platform promise to simplify life for the software engineer. Software which used to be custom written for each block and interface can now be reused from design to design. Better modeling leads to better design which leads to a higher-quality overall product.
TLM 2.0 is a giant leap forward for transaction-level modeling standards with its ability to offer engineers more freedom and creativity to design components. It leverages the link between hardware and software that should produce yet another wave of new electronic devices. However, just having a standard is obviously not enough. There have been numerous standards through the years that have withered due to lack of support by tool companies and end-users. TLM 2.0 has already been publicly endorsed by a large pool of EDA companies and leading developers. This critical mass has certainly gotten the standard off to a good start, but the upcoming wave of next-generation designs should be the tipping point which cements the value of the standard.
We are laying the foundation for a new wave in innovation in system design. The technology-obsessed engineer in me is convinced that a visit to the consumer electronics store in the not too distant future will feature an amazing array of new consumer electronics devices brought to us by TLM 2.0.