32-Bit RISC Controller Builds On PowerPC Core

Aug. 1, 1999

Based on a PowerPC 405B3 embedded core, the PowerPC 405GP embedded controller is a 32-bit RISC machine with enough performance (200 MHz) and peripheral integration to tackle wired/wireless communication, high-density storage, network printer, and other computing applications. The core tightly couples a 200-MHz CPU, MMU, instruction and data caches, and debug logic. The controller implements the IBM CoreConnect architecture, which consists of a 64-bit, 100-MHz Processor Local Bus and a 32-bit, 50-MHz On-Chip Peripheral Bus. The device also represents a Blue Logic superstructure, making it a suitable foundation for system-on-chip designs. On-chip peripherals include a PCI interface, SDRAM and Ethernet controllers, 4 kbytes of SRAM, and numerous other I/O.


To join the conversation, and become an exclusive member of Electronic Design, create an account today!