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Synthesis Tool Targets Million-Gate PLDs

Sept. 1, 1999

Programmable logic devices (PLDs) of one million gates or more are said to be easier and faster to design with when using the latest version of the LeonardoSpectrum synthesis tool. Enhancements to version 99.1 include improved team design flow capabilities that enable engineers to develop FPGAs by working together at the block level. The tool also incorporates an approach to incremental synthesis that’s said to dramatically acclerate design iterations, reducing cycle time from hours to minutes.Other enhancements include new algorithms that enable the tool to analyze an entire million-gate design and automatically make chip-level optimizations that reduce area and improve performance. Support is provided for devices from Actel, Altera, Dynachip, Lattice, Vantis and Xilinx.


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