At 300 MHz, Chip Family Breaks PLD Speed Limit

Introduced as the second generation of the SuperFAST BFW family of PLDs, the ispLSI 2000VE 3.3V in-system programmable PLDs consist of five devices, of which the ispLSI 2032VE is the fastest at 300 MHZ (FMAX). The new PLDs offer logic densities from 32 to 192 macrocells, input-to-clock setup times of 2 ns, clock-to-output delays of 2 ns, and comply with IEEE 1149.1. The ispLSI 2064VE is available in 32 and 64 I/O options and can operate at speeds of up to 280 MHz.
Other family members include the ispLSI 2096VE and ispLSI 2128VE at 250 MHz and the ispLSI 2192 at 225 MHz with 192 macrocells. All devices in the family are available in a choice of packages that include PLCCs, PQFPs, TQFPs, and fpBGAs. Prices range from $2 to $7.