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Electronic Design

65-nm RFCMOS Process Goes Online

UMC’s 65-nm RFCMOS process is not only up and running, but it’s reported that several customers are engaged for this advanced RF process, targeted for next-generation wireless system-on-a-chip (SoC) applications including WiFi, WiMAX, wireless USB, and cellular. The RF process is derived directly from UMC’s standard 65-nm CMOS logic process, which was qualified in early 2006 and is currently in volume production for a variety of customer products. Full compatibility with UMC’s standard CMOS logic/mixed-mode process enables easier integration of different SoC features such as mixed-mode, memory, analog, and RF elements.

Complete deliverables are available for UMC’s 65-nm RF fab line, including fundamental libraries, IP, and a transformer library to help customers jumpstart their design-in process. Full characterization reports, models with mismatch Monte Carlo simulation, advance HF noise models, and foundry design kits (FDKs) complement the 65-nm RF process. Also set to go are RF Spice models, ESD manuals and tech support.


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