Electronic Design

ASIC/SoC Prototyping System Handles Up To 28 Mgates

With up to 21 Xilinx Virtex-5 FPGAs, the CHIPit Platinum V5 prototyping system can handle ASIC and system-on-a-chip (SoC) designs of up to 28 Mgates. The system targets users who need early hardware prototypes for software developers or end customers, as well as those who wish to avoid cost-draining respins (see the figure).

Based on Xilinx's Virtex-5 LX330 FPGAs, the system features an enhanced architecture, beefed-up debugging features, and completely new software. A flexible and programmable connection topology between the FPGAs allows users to create a throng of configurations. According to the company, this system architecture, combined with the new CHIPit Manager Software v4.0, makes the implementation of ASIC and SoC designs easier than it has been with previous CHIPit prototyping systems.

The software environment guides users through the design-implementation process, helping them get their designs running on the CHIPit system as quickly as possible. In addition to a host of debugging features, the new software includes a tool for partitioning the user's design over the available FPGA resources. It does so with knowledge of the flexible interconnect architecture of the system, the available platform clock resources, the virtual location of the FPGA within the system, and other important factors such as the user interface.

Multiple verification modes are possible, including hardware/software cosimulation, transaction-based verification, and in-circuit emulation. While in transaction-based mode, the system's integrated SCE-MI interface and the corresponding software environment let users stimulate the design's bus interfaces with C++ testbenches at transaction level, thus minimizing the amount of data exchanged between the host and the CHIPit system.

Contact Pro Design directly for pricing and delivery information.

Pro Design Electronic GmbH

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