Electronic Design

Collaboration Results In First IEEE 1149.7 cJTAG Semiconductor IP Core

The industry’s first synthesizable IP core that implements the upcoming IEEE 1149.7 cJTAG standard, which will be ratified in early 2009, is available from IPextreme. The IEEE 1149.7 standard will provide designers with powerful extensions to the current IEEE 1149.1 (JTAG) standard, using fewer pins and maintaining compatibility with IEEE 1149.1-based hardware and software. The cJTAG-IEEE1149.7 IP core is a configurable, ready-to-integrate semiconductor IP solution supporting all six classes of the IEEE 1149.7 standard.

The synthesizable cJTAG core was developed by Texas Instruments and is being packaged, licensed, and supported by IPextreme. Rather than replacing or changing the IEEE 1149.1 JTAG standard, the IEEE 1149.7 standard offers a scalable set of extensions to IEEE 1149.1 that ensures interoperability between IEEE 1149.1- and IEEE 1149.7-based devices and test equipment.

Features of the cJTAG-IEEE1149.7 IP core include:

  • Support for IEEE 1149.7 classes 0–5 (selected through hardware configuration parameter).
  • Partitioned along IEEE 1149.7-specified functional boundaries:
    - Extended processing unit (EPU) for class 0–3 operation. Advanced processing unit (APU) for class 4–5 operation.
    - Further parameterization within EPU and APU for class-specific and optional features.
    - Separate blocks for clock and reset signal conditioning.
  • Supports all mandatory and optional scan formats: JScan0–3, SScan0–3, OScan0–7 and MScan.
  • Supports all mandatory and optional commands.
  • Firewall provides robust hot-connection by disabling test clock (TCK) until firewall is disabled by the debug test system (DTS).

The cJTAG-IEEE1149.7 product includes Verilog source code, integration testbench and tests, documentation and scripts for simulation and synthesis, with support for common EDA tools. CJTAG-IEEE 1149.7 is available now for $75,000 list price.

IPextreme www.ip-extreme.com

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