A precise signal-edge control feature allows the 1.1-Gbps, dual-channel, DG2040 high-performance data generator for semiconductor and circuit design test to quickly identify jitter and timing delay problems in high-speed digital designs. Design engineers can use the flexible logic source to supply high-speed data or clock stimulus in the design, characterization and verification of semiconductors or digital logic circuits.The edge control features simulates the jitter and wander likely to occur in real operating conditions by modulating all or specific pattern edges. At the system level, edge control is necessary to evaluate the amount of margin in the circuit under test. The instrument tests precise design timing margins to 500 MHz and jitter to ±100 ps. In semiconductor designs, this edge control adds the ability to simulate marginal data patterns and clock relationships.