DFM Tools Optimize IC Layouts

Increasing price competition and narrower market windows are forcing designers to ensure that every design works right the first time, so improving design yield and ramp-up time are essential to a project's success. Two new design-for-manufacturing (DFM) tools from Takumi Technology Corp. are designed to help with this task by optimizing IC physical design and enhancing yields. Called Takumi Inspect and Takumi Enhance, these tools detect, rate, and automatically repair hot spots in sub-90-nm designs.

Takumi Inspect is a layout analysis software tool that detects yield-impacting problems in GDSII layouts that are not detected by DRC or DFM rules and then rates them in terms of their probability of failure. It takes into account a wide range of manufacturing issues that impact yield and robustness, including those related to RET/OPC, lithography, random defects, systemic defects, and manufacturing tolerances.

Takumi Enhance is an automated physical design optimization system that rates GDS layouts for potential failures, prioritizes the failure mechanisms, and uses advanced optimization techniques to concurrently repair the layout against multiple failure mechanisms to provide hot-spot free designs. Takumi Enhance can also use information generated from other third-party pre- or post-OPC verification tools to drive Takumi's fast 2D layout optimization engine.