EDA Update: C-To-VHDL High-Level Synthesis Tool

A C-TO-VHDL high-level synthesis tool is now downloadable from the Center for Embedded Computing Systems of the University of California, Irvine. Called SPARK, it takes the behavior of an application specified in C as input (with some restrictions) and produces VHDL code. Several parallelizing compiler, compiler, and high-level synthesis transformations are used to generate a scheduled, resource-bound data path along with a finite state-machine controller. SPARK has been benchmarked on a range of multimedia and image-processing designs as well as through a case study with an Intel design. The download page features binaries for Solaris and Linux platforms, a user manual, and a tutorial with an MPEG-1 player as an example. See www.cecs.uci.edu/~spark/download.shtml for details.