EE Product News

Fast Clock Buffers Boast Very Low Jitter, Skew

The ADCLK9xx family of compact clock buffers aim at high-speed applications requiring low jitter. The 12-channel ADCLK954 LVPECL and ADCLK854 LVDS/CMOS and the 6-channel ADCLK946 LVPECL and ADCLK846 LVDS clock fanout buffers deliver up to four times as many channels on one chip, with better combined jitter and skew performance than competing devices in their category. Jitter is as low as 75 fs for the LVPECL devices and 100 fs for the LVDS/CMOS units. In addition, the clock buffers offer an extremely low 9-ps skew. Power consumption is 12-mW per channel at 100 MHz. The ADCLK854 version provides 24 CMOS channels. It also offers two selectable inputs and a sleep-mode feature. The IN_SEL pin-state determines which input fans out to the outputs. The SLEEP pin enables a sleep mode to power down the device. The inputs accept various single-ended and differential logic levels, including LVPECL, LVDS, HSTL (high-speed transceiver logic), CML (current-mode logic), and CMOS. The 4.8-GHz ADCLK954 has two selectable differential inputs via the IN_SEL control pin. Both incorporate 100-O on-chip termination resistors and can operate with either differential or single-ended sources. All the clock buffers are available now at prices ranging from $4.75 to $6.95 in quantities of 1000. ANALOG DEVICES INC., Norwood, MA. (781) 329-4700.


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