A prototype version of SiliconPipe's Interconnector design suite for creation of chip-to-chip interconnects is available for evaluation by the design community. The Interconnector suite is a tool that enables designers to create and test chip-to-chip interconnects that support signaling rates of up to 25 Gbytes/s. Interconnect designs use SiliconPipe's open-source, licensable IP, which include IC packaging, channel layout, and electrical connectors.
The Interconnector tool is intended to give system and silicon architects the ability to analyze chip-to-chip interconnects early in the design process; the alternative is an iterative approach later on with signal-integrity analysis tools using initial silicon and PCBs. With the Interconnector, they can rapidly run what-if analyses to speed up characterization during the design process.
Designers would use the tool by selecting ICs, channels, and connectors, and then provide system details in the form of parameters. They then add test components, such as signal sources and analyzers. Triggering the virtual signal generator creates both source data (a waveform) and sink data (an eye diagram).
SiliconPipe intends to make the Interconnector's production version freely available at its website once it's finalized. This initial version is available now to solicit user feedback. The prototype is not yet fully featured to perform analysis, but future versions will use S-parameter data from tests of actual materials and structures.
To evaluate the prototype, send an e-mail to: [email protected]