High-Density ASIC Revs Time To Production

April 1, 1999

Representing the latest addition to firm's COSMIC (cycle optimized sea of modules ICs) ASIC family, the 3G58406 406K-gate Module Based Array is intended for use where higher densities and performance are required than are available with programmable logic devices, but whose volume does not support the high NRE of standard cell technology. Designed to help reduce development and production ramp-up time for mainstream users of high-performance ASICs, the 3G58406 has 406,112 usable gates in 58,016 modules. The chip offers 516 available signal I/O pads, including 13 pre-defined I/O pads of 5 for JTAG, 4 for PLLs, and 4 for clock inputs, and 209 predefined Vdd/Vss pads. The chip addresses the needs of applications with high I/O requirements, such as computing and data switching.

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