Electronic Design

IEEE Approves Variation-Aware Extension To SPEF Format

The IEEE 1481 Working Group has approved Synopsys' proposal for an extension to the Standard Parasitic Exchange Format (SPEF) for process and temperature variation. The proposal enhances the existing IEEE Standard 1481-1999 for SPEF by providing a common medium to pass sensitivity-based parasitic information between electronic design automation (EDA) tools. The Synopsys proposal includes key extensions that accurately and concisely represent interconnect parasitic sensitivity information required for sub-65-nm processes. The draft standard for the SPEF extension is now pending balloting and approval by the IEEE Standards Board.

With shrinking device technologies, accurate modeling of random process variation for interconnects has become a requirement. Extraction and analysis tools use statistical techniques to model these effects. However, efficient and accurate statistical analysis requires sensitivity of interconnect parasitics with respect to physical and electrical process parameters. A standard sensitivity-based SPEF format would enable parasitic extraction tools to create a netlist with nominal values of parasitics and their sensitivities to interconnect process parameters, which can then be easily read by analysis, simulation and implementation tools.

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