Variability in lithography processes can have a profound effect on IC yield, particularly at 90 and 65 nm. Process variability can destroy image fidelity even when the operating conditions of the lithographic process window are acceptable. Mentor Graphics' Calibre OPCverify ferrets out lithographic errors or marginalities caused by process variability before the design goes to the mask or wafer manufacturer.
OPCverify creates a virtual-silicon image of an IC layer that's been corrected using optical proximity correction (OPC) tools. It does so for all defined process-window conditions. It then compares that image to the original (drawn) layer, measuring differences between the silicon contours and the drawn shapes, or between different silicon contours. OPC verification is typically a final check completed immediately before mask making.
OPCverify differs from earlier OPC verification tools in its granularity. Earlier tools use fracturing of the design, coupled with placement of some number of reference sites, as a basis for verification—the more fracturing that's performed, the more accurate the image. OPCverify pixelizes the entire chip, taking user dependency out of the accuracy equation.
Moreover, the pixelization technology employed in OPCverify holds implications for future developments from Mentor on the design side in the form of design-formanufacturing (DFM) technology. According to Charlie Albertalli, product marketing director in Mentor's Design to Silicon Division, "The evolution from rule-based verification to ruleplusmodel-based verification is under way."
Calibre OPCverify is available now. Pricing starts at $80,000.