PLLs Offer High Performance In Small Footprint

Claiming to offer the highest performance in the smallest footprint available for wireless applications, the ADF421x family of dual RF/IF PLL synthesizers enable local oscillators for the up- and down-conversion of RF signals in frequency and timing circuits. When combined with an external voltage controlled oscillator and loop filter, the family of ICs forms a complete PLL. The dual PLL synthesizer consists of a low noise digital phase frequency detector, a precision charge pump, a programmable reference divider, programmable A and B counters, and a dual modulus prescaler (P/P+1). A 14-bit reference counter allows a wide range of reference input frequencies at the PFD input. Control of all on-chip registers is done via a three-wire interface. Features include operation up to 3 GHz on a single 2.7- to 5.5-V supply, what is claimed to be the industry's lowest phase noise dual RF/IF integer-N PLL with performance exceeding 92dBc/Hz at 900 MHz, and 200-kHz channel spacing. TSSOP and chip scale packages are available and prices start at $2.36 each/10,000.