PowerPC-Based I/O Processor Gives Edge To PCI Designs

Sept. 1, 1998

A high-performance RISC CPU, a flexible local bus, a PCI system bus and hardware message-passing support are all attributes of the IOP 480, an I/O processor that incorporates a PowerPC core. The processor, which also features the company's PCI and I2O Data Pipe Architecture technology, is a good candidate for a wide array of PCI and CompactPCI embedded host and I/O adapter applications. The chip sports a PowerPC 32-bit RISC core with MMU, a 4-kbyte instruction cache and a 2-kbyte data cache. Performance is up to 80 MIPS at 66 MHz.

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