Interest in creating programmable intellectual property (IP), especially embedded processors or application-specific IP (ASIPs), continues to rise as tools that overcome its hurdles emerge. The latest release of CoWare's LISATek tools exemplifies the progress in embedded processor design.
With the 2004.1 release, users can model their processor using a high-level language. Users also can automatically generate instruction-set simulators (ISSs) as well as a complete set of associated tools, including the applicable C compiler. On top of that, custom processor design is possible through automatic generation of synthesizable RTL code.
The LISATek suite comprises the Processor Designer tool for creation of processor-IP simulation models and their software development tools, C Compiler Designer for creation of custom C compilers, and Processor Generator for producing the RTL implementation code. Users begin by describing the instruction set and microarchitecture of a processor using the LISA 2.0 language. Then, they can automatically generate both the ISS and assembler, linker, and debugger for their embedded processor.
The automated C-compiler generator saves the time and cost incurred by having to hand-program these engines in assembly language, an otherwise inefficient and error-prone process. The RTL-generation tool produces scripts for simulation and synthesis with Synopsys' Design Compiler. The RTL is generated with a standard synthesizable subset. Users can easily drop in their own code for critical datapaths that they've optimized for the application.
Pricing for the LISATek suite starts at $110,000 for a single-user, single-site networked floating license. The tools are available now.
CoWare Inc.www.coware.com