Processor Designer Improves Support For VLIW Processors

Feb. 4, 2007
CoWare's latest Processor Designer release boosts support for next-generation VLIW processors. Processor Designer enables users to explore a large design space to ensure that the targeted processing power is achieved and the interconnect infrastructure is

The latest release of CoWare's Processor Designer boosts support for next-generation very-long-instruction-word (VLIW) processors. Processor Designer enables users to explore a large design space to ensure that the targeted processing power is achieved and the interconnect infrastructure is available to feed data into the processor at an acceptable rate. The latter can only be done in the platform context. Because Processor Designer now provides that context, architectural exploration takes a matter of hours as opposed to several months.

VLIW architectures are an optimal target for today's C compiler technology. Such architectures do not require designs to sacrifice software development productivity for the very high-performance processing needed for the next-generation high-end video, multimedia and wireless devices. Developers of high-end video processing devices as well as wireless baseband processing devices can benefit from the new capabilities in Processor Designer. With the software programmability available through the Processor Designer flow, users can make adjustments for late changes in the standards and provide devices that can be programmed for different standards. This can be done while maintaining the performance of custom hardware.

If redundant parallel data paths are included, they make the design too expensive. Very specific customization of every application is required to be cost effective. New enhancements to the LISA language, which are now available through Processor Designer, enable users to parameterize the processor architecture with the number of parallel data paths (VLIW slots) to determine the optimal number of slots for a specific application and then customize each slot individually. The new Processor Designer fully automates the exploration of the number of parallel data paths by generating software development tools such as an assembler, linker, simulator, and a highly-optimizing C compiler for software performance measurement, as well as RTL code generation for hardware cost estimation. The result is that the user can script the exploration of various architectures with different data paths in a matter of hours rather than months.

Among the features in the current release of Processor Designer that contribute to the overall benefit of faster architecture exploration are:

  • full C compiler support for the new VLIW language extensions to enable quick exploration on the number of parallel instructions suitable for a specific application or application space;
  • efficient RTL generation from one specification, which enables quick cost analysis of the VLIW architecture;
  • and a unified debugging environment for standalone and system-level debugging to enable advanced debugging for the software application jointly with the processor and the platform hardware, which improves processor design and software development productivity.

Processor Designer is available now, and is priced between $150,000 and $300,000, depending on the configuration. For more information, visit www.coware.com.

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