Electronic Design

Signal-Integrity Verification Tool Sorts Out Interdependencies

Deep-submicron geometries, higher frequencies, and lower supply voltages are making signal-integrity analysis an intractable problem for ASIC designers. Particularly vexing are the interdependencies of signal-integrity issues, leading designers to chase one down and make fixes that only exacerbate others.

Stepping into the breach is Magma's Diamond SI tool for signoff-quality, post-layout signal-integrity analysis. It examines GDSII layout files for parameters like crosstalk noise, crosstalk delay, voltage drop, and electromigration on both power and signal nets. Most notably, it accounts for the interdependencies among these parameters.

The tool's two-step approach combines the speed of gate-level timing analysis with the accuracy of transistor-level analysis. It pinpoints potential problem nets and then applies Spice-level analysis on them to determine which have actual problems that must be corrected. The tool automatically generates Spice decks for those critical nets and the required switching vectors to enable the dynamic analysis.

Based on Magma's unified data model architecture, Diamond SI uses proven timing, extraction, and analysis engines that have complete access to all design data. As a result, the tool performs concurrent analysis for interdependent signal-integrity effects without relying on file-based interfaces. When used with Magma's IC implementation flow, Diamond SI provides a means of digging out signal-integrity problems throughout the flow.

Diamond SI is available for the Solaris and Linux platforms. Pricing starts at $240,700.

Magma Design Automation Inc., www.magma-da.com; Sameer Patel, (408) 864-2235.

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