Electronic Design

Simulation Engine Adds SystemC Modeling

WITH USE OF SYSTEMC ON THE RISE, designers need simulators that can handle microarchitecturelevel exploration as well as full-system macroarchitecture modeling. Mirabilis Design's VisualSim Architect simulator has been enhanced with the coupling of SystemC v2.1 to its core engine.

The simulator addresses SystemC limitations in former releases. It accelerates construction and analysis of transaction-level models (TLMs) by a factor of three. Also, it enables software design and adds pre-built traffic, analysis, and resource sharing. The system extends the FIFOs and basic programming constructs of SystemC with prebuilt building-block libraries.

VisualSim seamlessly imports existing models and intellectual property available in SystemC. It also generates templates for construction of new SystemC models. With this release, Mirabilis has created a superset of the proposed Open SystemC Initiative (OSCI) SystemC 3.0 specification.

SystemC-related enhancements include graphical UML entry and XML-based connectivity management; graphical state-machine definitions; application-specific traffic generators; co-simulation with Matlab, Excel, Verilog, VHDL, serial I/O, and hardware-in-the-loop; pre-built statistics generators and dynamic runtime visualization tools; and mixed-signal simulation.

VisualSim SystemC Modeler is currently available on Windows, Linux, and Unix. It requires VisualSim Architect. Starting at $1700, pricing includes the OSCI SystemC v2.1 simulator at no cost.

Mirabilis Design

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